提交 2ce2e51f 编写于 作者: S Sami Tolvanen 提交者: Yang Yingliang

arm64: use a common .arch preamble for inline assembly

mainline inclusion
from mainline-v5.8
commit 1764c3ed
category: bugfix
CVE: NA

-----------------------

Commit 7c78f67e ("arm64: enable tlbi range instructions") breaks
LLVM's integrated assembler, because -Wa,-march is only passed to
external assemblers and therefore, the new instructions are not enabled
when IAS is used.

This change adds a common architecture version preamble, which can be
used in inline assembly blocks that contain instructions that require
a newer architecture version, and uses it to fix __TLBI_0 and __TLBI_1
with ARM64_TLB_RANGE.

Fixes: 7c78f67e ("arm64: enable tlbi range instructions")
Signed-off-by: NSami Tolvanen <samitolvanen@google.com>
Tested-by: NNathan Chancellor <natechancellor@gmail.com>
Reviewed-by: NNathan Chancellor <natechancellor@gmail.com>
Link: https://github.com/ClangBuiltLinux/linux/issues/1106
Link: https://lore.kernel.org/r/20200827203608.1225689-1-samitolvanen@google.comSigned-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NYuan Can <yuancan@huawei.com>
Reviewed-by: NXie XiuQi <xiexiuqi@huawei.com>
Signed-off-by: NYang Yingliang <yangyingliang@huawei.com>
上级 5cd78c12
...@@ -64,13 +64,21 @@ branch-prot-flags-$(CONFIG_CC_HAS_BRANCH_PROT_PAC_RET) := -mbranch-protection=pa ...@@ -64,13 +64,21 @@ branch-prot-flags-$(CONFIG_CC_HAS_BRANCH_PROT_PAC_RET) := -mbranch-protection=pa
# compiler to generate them and consequently to break the single image contract # compiler to generate them and consequently to break the single image contract
# we pass it only to the assembler. This option is utilized only in case of non # we pass it only to the assembler. This option is utilized only in case of non
# integrated assemblers. # integrated assemblers.
branch-prot-flags-$(CONFIG_AS_HAS_PAC) += -Wa,-march=armv8.3-a ifeq ($(CONFIG_AS_HAS_PAC), y)
KBUILD_CFLAGS += $(branch-prot-flags-y) asm-arch := armv8.3-a
endif
endif endif
KBUILD_CFLAGS += $(branch-prot-flags-y)
ifeq ($(CONFIG_AS_HAS_ARMV8_4), y) ifeq ($(CONFIG_AS_HAS_ARMV8_4), y)
# make sure to pass the newest target architecture to -march. # make sure to pass the newest target architecture to -march.
KBUILD_CFLAGS += -Wa,-march=armv8.4-a asm-arch := armv8.4-a
endif
ifdef asm-arch
KBUILD_CFLAGS += -Wa,-march=$(asm-arch) \
-DARM64_ASM_ARCH='"$(asm-arch)"'
endif endif
ifeq ($(CONFIG_CPU_BIG_ENDIAN), y) ifeq ($(CONFIG_CPU_BIG_ENDIAN), y)
......
...@@ -18,6 +18,12 @@ ...@@ -18,6 +18,12 @@
#ifndef __ASM_COMPILER_H #ifndef __ASM_COMPILER_H
#define __ASM_COMPILER_H #define __ASM_COMPILER_H
#ifdef ARM64_ASM_ARCH
#define ARM64_ASM_PREAMBLE ".arch " ARM64_ASM_ARCH "\n"
#else
#define ARM64_ASM_PREAMBLE
#endif
/* /*
* This is used to ensure the compiler did actually allocate the register we * This is used to ensure the compiler did actually allocate the register we
* asked it for some inline assembly sequences. Apparently we can't trust the * asked it for some inline assembly sequences. Apparently we can't trust the
......
...@@ -39,14 +39,16 @@ ...@@ -39,14 +39,16 @@
* not. The macros handles invoking the asm with or without the * not. The macros handles invoking the asm with or without the
* register argument as appropriate. * register argument as appropriate.
*/ */
#define __TLBI_0(op, arg) asm ("tlbi " #op "\n" \ #define __TLBI_0(op, arg) asm (ARM64_ASM_PREAMBLE \
"tlbi " #op "\n" \
ALTERNATIVE("nop\n nop", \ ALTERNATIVE("nop\n nop", \
"dsb ish\n tlbi " #op, \ "dsb ish\n tlbi " #op, \
ARM64_WORKAROUND_REPEAT_TLBI, \ ARM64_WORKAROUND_REPEAT_TLBI, \
CONFIG_QCOM_FALKOR_ERRATUM_1009) \ CONFIG_QCOM_FALKOR_ERRATUM_1009) \
: : ) : : )
#define __TLBI_1(op, arg) asm ("tlbi " #op ", %0\n" \ #define __TLBI_1(op, arg) asm (ARM64_ASM_PREAMBLE \
"tlbi " #op ", %0\n" \
ALTERNATIVE("nop\n nop", \ ALTERNATIVE("nop\n nop", \
"dsb ish\n tlbi " #op ", %0", \ "dsb ish\n tlbi " #op ", %0", \
ARM64_WORKAROUND_REPEAT_TLBI, \ ARM64_WORKAROUND_REPEAT_TLBI, \
......
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