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2bdb4995
编写于
8月 20, 2015
作者:
B
Ben Skeggs
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
drm/nouveau/fuse: switch to device pri macros
Signed-off-by:
N
Ben Skeggs
<
bskeggs@redhat.com
>
上级
6758745b
变更
3
隐藏空白更改
内联
并排
Showing
3 changed file
with
12 addition
and
9 deletion
+12
-9
drivers/gpu/drm/nouveau/nvkm/subdev/fuse/gf100.c
drivers/gpu/drm/nouveau/nvkm/subdev/fuse/gf100.c
+6
-5
drivers/gpu/drm/nouveau/nvkm/subdev/fuse/gm107.c
drivers/gpu/drm/nouveau/nvkm/subdev/fuse/gm107.c
+2
-1
drivers/gpu/drm/nouveau/nvkm/subdev/fuse/nv50.c
drivers/gpu/drm/nouveau/nvkm/subdev/fuse/nv50.c
+4
-3
未找到文件。
drivers/gpu/drm/nouveau/nvkm/subdev/fuse/gf100.c
浏览文件 @
2bdb4995
...
...
@@ -33,16 +33,17 @@ static u32
gf100_fuse_rd32
(
struct
nvkm_object
*
object
,
u64
addr
)
{
struct
gf100_fuse
*
fuse
=
(
void
*
)
object
;
struct
nvkm_device
*
device
=
fuse
->
base
.
subdev
.
device
;
unsigned
long
flags
;
u32
fuse_enable
,
unk
,
val
;
/* racy if another part of nvkm start writing to these regs */
spin_lock_irqsave
(
&
fuse
->
fuse_enable_lock
,
flags
);
fuse_enable
=
nv
_mask
(
fus
e
,
0x22400
,
0x800
,
0x800
);
unk
=
nv
_mask
(
fus
e
,
0x21000
,
0x1
,
0x1
);
val
=
nv
_rd32
(
fus
e
,
0x21100
+
addr
);
nv
_wr32
(
fus
e
,
0x21000
,
unk
);
nv
_wr32
(
fus
e
,
0x22400
,
fuse_enable
);
fuse_enable
=
nv
km_mask
(
devic
e
,
0x22400
,
0x800
,
0x800
);
unk
=
nv
km_mask
(
devic
e
,
0x21000
,
0x1
,
0x1
);
val
=
nv
km_rd32
(
devic
e
,
0x21100
+
addr
);
nv
km_wr32
(
devic
e
,
0x21000
,
unk
);
nv
km_wr32
(
devic
e
,
0x22400
,
fuse_enable
);
spin_unlock_irqrestore
(
&
fuse
->
fuse_enable_lock
,
flags
);
return
val
;
}
...
...
drivers/gpu/drm/nouveau/nvkm/subdev/fuse/gm107.c
浏览文件 @
2bdb4995
...
...
@@ -27,7 +27,8 @@ static u32
gm107_fuse_rd32
(
struct
nvkm_object
*
object
,
u64
addr
)
{
struct
nvkm_fuse
*
fuse
=
(
void
*
)
object
;
return
nv_rd32
(
fuse
,
0x21100
+
addr
);
struct
nvkm_device
*
device
=
fuse
->
subdev
.
device
;
return
nvkm_rd32
(
device
,
0x21100
+
addr
);
}
...
...
drivers/gpu/drm/nouveau/nvkm/subdev/fuse/nv50.c
浏览文件 @
2bdb4995
...
...
@@ -33,14 +33,15 @@ static u32
nv50_fuse_rd32
(
struct
nvkm_object
*
object
,
u64
addr
)
{
struct
nv50_fuse
*
fuse
=
(
void
*
)
object
;
struct
nvkm_device
*
device
=
fuse
->
base
.
subdev
.
device
;
unsigned
long
flags
;
u32
fuse_enable
,
val
;
/* racy if another part of nvkm start writing to this reg */
spin_lock_irqsave
(
&
fuse
->
fuse_enable_lock
,
flags
);
fuse_enable
=
nv
_mask
(
fus
e
,
0x1084
,
0x800
,
0x800
);
val
=
nv
_rd32
(
fus
e
,
0x21000
+
addr
);
nv
_wr32
(
fus
e
,
0x1084
,
fuse_enable
);
fuse_enable
=
nv
km_mask
(
devic
e
,
0x1084
,
0x800
,
0x800
);
val
=
nv
km_rd32
(
devic
e
,
0x21000
+
addr
);
nv
km_wr32
(
devic
e
,
0x1084
,
fuse_enable
);
spin_unlock_irqrestore
(
&
fuse
->
fuse_enable_lock
,
flags
);
return
val
;
}
...
...
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