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提交 2a266f8b 编写于 作者: N Nicolin Chen 提交者： Mark Brown
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ASoC: fsl_sai: Use FSL_SAI_xXR() and regmap_update_bits() to simplify code 

By doing this, the driver can drop around 50 lines and become neater.
Signed-off-by: NNicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: NMark Brown <broonie@linaro.org>
上级 f84526cf
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Showing with 25 addition and 76 deletion
sound/soc/fsl/fsl_sai.c
浏览文件 @ 2a266f8b
...@@ -119,16 +119,8 @@ static int fsl_sai_set_dai_sysclk_tr(struct snd_soc_dai *cpu_dai, ...@@ -119,16 +119,8 @@ static int fsl_sai_set_dai_sysclk_tr(struct snd_soc_dai *cpu_dai,
int clk_id, unsigned int freq, int fsl_dir) int clk_id, unsigned int freq, int fsl_dir)
{ {
struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai); struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);
u32 val_cr2, reg_cr2; bool tx = fsl_dir == FSL_FMT_TRANSMITTER;
u32 val_cr2 = 0;
if (fsl_dir == FSL_FMT_TRANSMITTER)
reg_cr2 = FSL_SAI_TCR2;
else
reg_cr2 = FSL_SAI_RCR2;
regmap_read(sai->regmap, reg_cr2, &val_cr2);
val_cr2 &= ~FSL_SAI_CR2_MSEL_MASK;
switch (clk_id) { switch (clk_id) {
case FSL_SAI_CLK_BUS: case FSL_SAI_CLK_BUS:
...@@ -147,7 +139,8 @@ static int fsl_sai_set_dai_sysclk_tr(struct snd_soc_dai *cpu_dai, ...@@ -147,7 +139,8 @@ static int fsl_sai_set_dai_sysclk_tr(struct snd_soc_dai *cpu_dai,
return -EINVAL; return -EINVAL;
} }
regmap_write(sai->regmap, reg_cr2, val_cr2); regmap_update_bits(sai->regmap, FSL_SAI_xCR2(tx),
FSL_SAI_CR2_MSEL_MASK, val_cr2);
return 0; return 0;
} }
...@@ -179,22 +172,10 @@ static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai *cpu_dai, ...@@ -179,22 +172,10 @@ static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai *cpu_dai,
unsigned int fmt, int fsl_dir) unsigned int fmt, int fsl_dir)
{ {
struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai); struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);
u32 val_cr2, val_cr4, reg_cr2, reg_cr4; bool tx = fsl_dir == FSL_FMT_TRANSMITTER;
u32 val_cr2 = 0, val_cr4 = 0;
if (fsl_dir == FSL_FMT_TRANSMITTER) {
reg_cr2 = FSL_SAI_TCR2;
reg_cr4 = FSL_SAI_TCR4;
} else {
reg_cr2 = FSL_SAI_RCR2;
reg_cr4 = FSL_SAI_RCR4;
}
regmap_read(sai->regmap, reg_cr2, &val_cr2); if (!sai->big_endian_data)
regmap_read(sai->regmap, reg_cr4, &val_cr4);
if (sai->big_endian_data)
val_cr4 &= ~FSL_SAI_CR4_MF;
else
val_cr4 |= FSL_SAI_CR4_MF; val_cr4 |= FSL_SAI_CR4_MF;
/* DAI mode */ /* DAI mode */
...@@ -215,7 +196,6 @@ static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai *cpu_dai, ...@@ -215,7 +196,6 @@ static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai *cpu_dai,
* frame sync asserts with the first bit of the frame. * frame sync asserts with the first bit of the frame.
*/ */
val_cr2 |= FSL_SAI_CR2_BCP; val_cr2 |= FSL_SAI_CR2_BCP;
val_cr4 &= ~(FSL_SAI_CR4_FSE | FSL_SAI_CR4_FSP);
break; break;
case SND_SOC_DAIFMT_DSP_A: case SND_SOC_DAIFMT_DSP_A:
/* /*
...@@ -225,7 +205,6 @@ static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai *cpu_dai, ...@@ -225,7 +205,6 @@ static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai *cpu_dai,
* data word. * data word.
*/ */
val_cr2 |= FSL_SAI_CR2_BCP; val_cr2 |= FSL_SAI_CR2_BCP;
val_cr4 &= ~FSL_SAI_CR4_FSP;
val_cr4 |= FSL_SAI_CR4_FSE; val_cr4 |= FSL_SAI_CR4_FSE;
sai->is_dsp_mode = true; sai->is_dsp_mode = true;
break; break;
...@@ -235,7 +214,6 @@ static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai *cpu_dai, ...@@ -235,7 +214,6 @@ static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai *cpu_dai,
* frame sync asserts with the first bit of the frame. * frame sync asserts with the first bit of the frame.
*/ */
val_cr2 |= FSL_SAI_CR2_BCP; val_cr2 |= FSL_SAI_CR2_BCP;
val_cr4 &= ~(FSL_SAI_CR4_FSE | FSL_SAI_CR4_FSP);
sai->is_dsp_mode = true; sai->is_dsp_mode = true;
break; break;
case SND_SOC_DAIFMT_RIGHT_J: case SND_SOC_DAIFMT_RIGHT_J:
...@@ -273,23 +251,22 @@ static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai *cpu_dai, ...@@ -273,23 +251,22 @@ static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai *cpu_dai,
val_cr4 |= FSL_SAI_CR4_FSD_MSTR; val_cr4 |= FSL_SAI_CR4_FSD_MSTR;
break; break;
case SND_SOC_DAIFMT_CBM_CFM: case SND_SOC_DAIFMT_CBM_CFM:
val_cr2 &= ~FSL_SAI_CR2_BCD_MSTR;
val_cr4 &= ~FSL_SAI_CR4_FSD_MSTR;
break; break;
case SND_SOC_DAIFMT_CBS_CFM: case SND_SOC_DAIFMT_CBS_CFM:
val_cr2 |= FSL_SAI_CR2_BCD_MSTR; val_cr2 |= FSL_SAI_CR2_BCD_MSTR;
val_cr4 &= ~FSL_SAI_CR4_FSD_MSTR;
break; break;
case SND_SOC_DAIFMT_CBM_CFS: case SND_SOC_DAIFMT_CBM_CFS:
val_cr2 &= ~FSL_SAI_CR2_BCD_MSTR;
val_cr4 |= FSL_SAI_CR4_FSD_MSTR; val_cr4 |= FSL_SAI_CR4_FSD_MSTR;
break; break;
default: default:
return -EINVAL; return -EINVAL;
} }
regmap_write(sai->regmap, reg_cr2, val_cr2); regmap_update_bits(sai->regmap, FSL_SAI_xCR2(tx),
regmap_write(sai->regmap, reg_cr4, val_cr4); FSL_SAI_CR2_BCP | FSL_SAI_CR2_BCD_MSTR, val_cr2);
regmap_update_bits(sai->regmap, FSL_SAI_xCR4(tx),
FSL_SAI_CR4_MF | FSL_SAI_CR4_FSE |
FSL_SAI_CR4_FSP | FSL_SAI_CR4_FSD_MSTR, val_cr4);
return 0; return 0;
} }
...@@ -316,29 +293,10 @@ static int fsl_sai_hw_params(struct snd_pcm_substream *substream, ...@@ -316,29 +293,10 @@ static int fsl_sai_hw_params(struct snd_pcm_substream *substream,
struct snd_soc_dai *cpu_dai) struct snd_soc_dai *cpu_dai)
{ {
struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai); struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);
u32 val_cr4, val_cr5, val_mr, reg_cr4, reg_cr5, reg_mr; bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
unsigned int channels = params_channels(params); unsigned int channels = params_channels(params);
u32 word_width = snd_pcm_format_width(params_format(params)); u32 word_width = snd_pcm_format_width(params_format(params));
u32 val_cr4 = 0, val_cr5 = 0;
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
reg_cr4 = FSL_SAI_TCR4;
reg_cr5 = FSL_SAI_TCR5;
reg_mr = FSL_SAI_TMR;
} else {
reg_cr4 = FSL_SAI_RCR4;
reg_cr5 = FSL_SAI_RCR5;
reg_mr = FSL_SAI_RMR;
}
regmap_read(sai->regmap, reg_cr4, &val_cr4);
regmap_read(sai->regmap, reg_cr4, &val_cr5);
val_cr4 &= ~FSL_SAI_CR4_SYWD_MASK;
val_cr4 &= ~FSL_SAI_CR4_FRSZ_MASK;
val_cr5 &= ~FSL_SAI_CR5_WNW_MASK;
val_cr5 &= ~FSL_SAI_CR5_W0W_MASK;
val_cr5 &= ~FSL_SAI_CR5_FBT_MASK;
if (!sai->is_dsp_mode) if (!sai->is_dsp_mode)
val_cr4 |= FSL_SAI_CR4_SYWD(word_width); val_cr4 |= FSL_SAI_CR4_SYWD(word_width);
...@@ -346,18 +304,20 @@ static int fsl_sai_hw_params(struct snd_pcm_substream *substream, ...@@ -346,18 +304,20 @@ static int fsl_sai_hw_params(struct snd_pcm_substream *substream,
val_cr5 |= FSL_SAI_CR5_WNW(word_width); val_cr5 |= FSL_SAI_CR5_WNW(word_width);
val_cr5 |= FSL_SAI_CR5_W0W(word_width); val_cr5 |= FSL_SAI_CR5_W0W(word_width);
val_cr5 &= ~FSL_SAI_CR5_FBT_MASK;
if (sai->big_endian_data) if (sai->big_endian_data)
val_cr5 |= FSL_SAI_CR5_FBT(0); val_cr5 |= FSL_SAI_CR5_FBT(0);
else else
val_cr5 |= FSL_SAI_CR5_FBT(word_width - 1); val_cr5 |= FSL_SAI_CR5_FBT(word_width - 1);
val_cr4 |= FSL_SAI_CR4_FRSZ(channels); val_cr4 |= FSL_SAI_CR4_FRSZ(channels);
val_mr = ~0UL - ((1 << channels) - 1);
regmap_write(sai->regmap, reg_cr4, val_cr4); regmap_update_bits(sai->regmap, FSL_SAI_xCR4(tx),
regmap_write(sai->regmap, reg_cr5, val_cr5); FSL_SAI_CR4_SYWD_MASK | FSL_SAI_CR4_FRSZ_MASK,
regmap_write(sai->regmap, reg_mr, val_mr); val_cr4);
regmap_update_bits(sai->regmap, FSL_SAI_xCR5(tx),
FSL_SAI_CR5_WNW_MASK | FSL_SAI_CR5_W0W_MASK |
FSL_SAI_CR5_FBT_MASK, val_cr5);
regmap_write(sai->regmap, FSL_SAI_xMR(tx), ~0UL - ((1 << channels) - 1));
return 0; return 0;
} }
...@@ -428,8 +388,8 @@ static int fsl_sai_startup(struct snd_pcm_substream *substream, ...@@ -428,8 +388,8 @@ static int fsl_sai_startup(struct snd_pcm_substream *substream,
struct snd_soc_dai *cpu_dai) struct snd_soc_dai *cpu_dai)
{ {
struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai); struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);
bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
struct device *dev = &sai->pdev->dev; struct device *dev = &sai->pdev->dev;
u32 reg;
int ret; int ret;
ret = clk_prepare_enable(sai->bus_clk); ret = clk_prepare_enable(sai->bus_clk);
...@@ -438,12 +398,7 @@ static int fsl_sai_startup(struct snd_pcm_substream *substream, ...@@ -438,12 +398,7 @@ static int fsl_sai_startup(struct snd_pcm_substream *substream,
return ret; return ret;
} }
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx), FSL_SAI_CR3_TRCE,
reg = FSL_SAI_TCR3;
else
reg = FSL_SAI_RCR3;
regmap_update_bits(sai->regmap, reg, FSL_SAI_CR3_TRCE,
FSL_SAI_CR3_TRCE); FSL_SAI_CR3_TRCE);
return 0; return 0;
...@@ -453,15 +408,9 @@ static void fsl_sai_shutdown(struct snd_pcm_substream *substream, ...@@ -453,15 +408,9 @@ static void fsl_sai_shutdown(struct snd_pcm_substream *substream,
struct snd_soc_dai *cpu_dai) struct snd_soc_dai *cpu_dai)
{ {
struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai); struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);
u32 reg; bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
reg = FSL_SAI_TCR3;
else
reg = FSL_SAI_RCR3;
regmap_update_bits(sai->regmap, reg, FSL_SAI_CR3_TRCE, regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx), FSL_SAI_CR3_TRCE, 0);
~FSL_SAI_CR3_TRCE);
clk_disable_unprepare(sai->bus_clk); clk_disable_unprepare(sai->bus_clk);
} }
......
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