drm/amd/display: fix dcn20 odm dpp programming

dcn20 requires special casing for odm.
This change treats odm as alternative to mpc tree on dcn20.

This is planned to be fixed in a future refactor
Signed-off-by: NDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: NCharlene Liu <Charlene.Liu@amd.com>
Acked-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

drivers/gpu/drm/amd/display/dc/core/dc.c

@@ -2026,6 +2026,7 @@ static void commit_planes_for_stream(struct dc *dc,
 		struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j];
 
 		if (!pipe_ctx->top_pipe &&
+			!pipe_ctx->prev_odm_pipe &&
 			pipe_ctx->stream &&
 			pipe_ctx->stream == stream) {
 			struct dc_stream_status *stream_status = NULL;

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c

@@ -1054,8 +1054,13 @@ static void dcn20_program_all_pipe_in_tree(
 	if (pipe_ctx->plane_state != NULL)
 		dcn20_program_pipe(dc, pipe_ctx, context);
 
-	if (pipe_ctx->bottom_pipe != NULL && pipe_ctx->bottom_pipe != pipe_ctx)
+	if (pipe_ctx->bottom_pipe != NULL) {
+		ASSERT(pipe_ctx->bottom_pipe != pipe_ctx);
 		dcn20_program_all_pipe_in_tree(dc, pipe_ctx->bottom_pipe, context);
+	} else if (pipe_ctx->next_odm_pipe != NULL) {
+		ASSERT(pipe_ctx->next_odm_pipe != pipe_ctx);
+		dcn20_program_all_pipe_in_tree(dc, pipe_ctx->next_odm_pipe, context);
+	}
 }
 
 void dcn20_pipe_control_lock_global(