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提交 275c08b5 编写于 作者: T Troy Kisky 提交者： Shawn Guo
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ARM: dts: imx: imx6qdl.dtsi: use IRQ_TYPE_LEVEL_HIGH 

Make the interrupts node slightly more readable.
Signed-off-by: NTroy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
上级 13088c23
隐藏空白更改
内联 并排
Showing with 92 addition and 70 deletion
arch/arm/boot/dts/imx6qdl.dtsi
浏览文件 @ 275c08b5
...@@ -75,7 +75,10 @@ ...@@ -75,7 +75,10 @@
dma_apbh: dma-apbh@00110000 { dma_apbh: dma-apbh@00110000 {
compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh"; compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh";
reg = <0x00110000 0x2000>; reg = <0x00110000 0x2000>;
interrupts = <0 13 0x04>, <0 13 0x04>, <0 13 0x04>, <0 13 0x04>; interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>,
<0 13 IRQ_TYPE_LEVEL_HIGH>,
<0 13 IRQ_TYPE_LEVEL_HIGH>,
<0 13 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3"; interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
#dma-cells = <1>; #dma-cells = <1>;
dma-channels = <4>; dma-channels = <4>;
...@@ -88,7 +91,7 @@ ...@@ -88,7 +91,7 @@
#size-cells = <1>; #size-cells = <1>;
reg = <0x00112000 0x2000>, <0x00114000 0x2000>; reg = <0x00112000 0x2000>, <0x00114000 0x2000>;
reg-names = "gpmi-nand", "bch"; reg-names = "gpmi-nand", "bch";
interrupts = <0 15 0x04>; interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "bch"; interrupt-names = "bch";
clocks = <&clks 152>, <&clks 153>, <&clks 151>, clocks = <&clks 152>, <&clks 153>, <&clks 151>,
<&clks 150>, <&clks 149>; <&clks 150>, <&clks 149>;
...@@ -109,7 +112,7 @@ ...@@ -109,7 +112,7 @@
L2: l2-cache@00a02000 { L2: l2-cache@00a02000 {
compatible = "arm,pl310-cache"; compatible = "arm,pl310-cache";
reg = <0x00a02000 0x1000>; reg = <0x00a02000 0x1000>;
interrupts = <0 92 0x04>; interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>;
cache-unified; cache-unified;
cache-level = <2>; cache-level = <2>;
arm,tag-latency = <4 2 3>; arm,tag-latency = <4 2 3>;
...@@ -126,7 +129,7 @@ ...@@ -126,7 +129,7 @@
0x81000000 0 0 0x01f80000 0 0x00010000 /* downstream I/O */ 0x81000000 0 0 0x01f80000 0 0x00010000 /* downstream I/O */
0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */ 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */
num-lanes = <1>; num-lanes = <1>;
interrupts = <0 123 0x04>; interrupts = <0 123 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 189>, <&clks 187>, <&clks 206>, <&clks 144>; clocks = <&clks 189>, <&clks 187>, <&clks 206>, <&clks 144>;
clock-names = "pcie_ref_125m", "sata_ref_100m", "lvds_gate", "pcie_axi"; clock-names = "pcie_ref_125m", "sata_ref_100m", "lvds_gate", "pcie_axi";
status = "disabled"; status = "disabled";
...@@ -134,7 +137,7 @@ ...@@ -134,7 +137,7 @@
pmu { pmu {
compatible = "arm,cortex-a9-pmu"; compatible = "arm,cortex-a9-pmu";
interrupts = <0 94 0x04>; interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
}; };
aips-bus@02000000 { /* AIPS1 */ aips-bus@02000000 { /* AIPS1 */
...@@ -154,7 +157,7 @@ ...@@ -154,7 +157,7 @@
spdif: spdif@02004000 { spdif: spdif@02004000 {
compatible = "fsl,imx35-spdif"; compatible = "fsl,imx35-spdif";
reg = <0x02004000 0x4000>; reg = <0x02004000 0x4000>;
interrupts = <0 52 0x04>; interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&sdma 14 18 0>, dmas = <&sdma 14 18 0>,
<&sdma 15 18 0>; <&sdma 15 18 0>;
dma-names = "rx", "tx"; dma-names = "rx", "tx";
...@@ -176,7 +179,7 @@ ...@@ -176,7 +179,7 @@
#size-cells = <0>; #size-cells = <0>;
compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
reg = <0x02008000 0x4000>; reg = <0x02008000 0x4000>;
interrupts = <0 31 0x04>; interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 112>, <&clks 112>; clocks = <&clks 112>, <&clks 112>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
status = "disabled"; status = "disabled";
...@@ -187,7 +190,7 @@ ...@@ -187,7 +190,7 @@
#size-cells = <0>; #size-cells = <0>;
compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
reg = <0x0200c000 0x4000>; reg = <0x0200c000 0x4000>;
interrupts = <0 32 0x04>; interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 113>, <&clks 113>; clocks = <&clks 113>, <&clks 113>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
status = "disabled"; status = "disabled";
...@@ -198,7 +201,7 @@ ...@@ -198,7 +201,7 @@
#size-cells = <0>; #size-cells = <0>;
compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
reg = <0x02010000 0x4000>; reg = <0x02010000 0x4000>;
interrupts = <0 33 0x04>; interrupts = <0 33 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 114>, <&clks 114>; clocks = <&clks 114>, <&clks 114>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
status = "disabled"; status = "disabled";
...@@ -209,7 +212,7 @@ ...@@ -209,7 +212,7 @@
#size-cells = <0>; #size-cells = <0>;
compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
reg = <0x02014000 0x4000>; reg = <0x02014000 0x4000>;
interrupts = <0 34 0x04>; interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 115>, <&clks 115>; clocks = <&clks 115>, <&clks 115>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
status = "disabled"; status = "disabled";
...@@ -218,7 +221,7 @@ ...@@ -218,7 +221,7 @@
uart1: serial@02020000 { uart1: serial@02020000 {
compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x02020000 0x4000>; reg = <0x02020000 0x4000>;
interrupts = <0 26 0x04>; interrupts = <0 26 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 160>, <&clks 161>; clocks = <&clks 160>, <&clks 161>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
dmas = <&sdma 25 4 0>, <&sdma 26 4 0>; dmas = <&sdma 25 4 0>, <&sdma 26 4 0>;
...@@ -228,13 +231,13 @@ ...@@ -228,13 +231,13 @@
esai: esai@02024000 { esai: esai@02024000 {
reg = <0x02024000 0x4000>; reg = <0x02024000 0x4000>;
interrupts = <0 51 0x04>; interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>;
}; };
ssi1: ssi@02028000 { ssi1: ssi@02028000 {
compatible = "fsl,imx6q-ssi","fsl,imx21-ssi"; compatible = "fsl,imx6q-ssi","fsl,imx21-ssi";
reg = <0x02028000 0x4000>; reg = <0x02028000 0x4000>;
interrupts = <0 46 0x04>; interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 178>; clocks = <&clks 178>;
dmas = <&sdma 37 1 0>, dmas = <&sdma 37 1 0>,
<&sdma 38 1 0>; <&sdma 38 1 0>;
...@@ -247,7 +250,7 @@ ...@@ -247,7 +250,7 @@
ssi2: ssi@0202c000 { ssi2: ssi@0202c000 {
compatible = "fsl,imx6q-ssi","fsl,imx21-ssi"; compatible = "fsl,imx6q-ssi","fsl,imx21-ssi";
reg = <0x0202c000 0x4000>; reg = <0x0202c000 0x4000>;
interrupts = <0 47 0x04>; interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 179>; clocks = <&clks 179>;
dmas = <&sdma 41 1 0>, dmas = <&sdma 41 1 0>,
<&sdma 42 1 0>; <&sdma 42 1 0>;
...@@ -260,7 +263,7 @@ ...@@ -260,7 +263,7 @@
ssi3: ssi@02030000 { ssi3: ssi@02030000 {
compatible = "fsl,imx6q-ssi","fsl,imx21-ssi"; compatible = "fsl,imx6q-ssi","fsl,imx21-ssi";
reg = <0x02030000 0x4000>; reg = <0x02030000 0x4000>;
interrupts = <0 48 0x04>; interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 180>; clocks = <&clks 180>;
dmas = <&sdma 45 1 0>, dmas = <&sdma 45 1 0>,
<&sdma 46 1 0>; <&sdma 46 1 0>;
...@@ -272,7 +275,7 @@ ...@@ -272,7 +275,7 @@
asrc: asrc@02034000 { asrc: asrc@02034000 {
reg = <0x02034000 0x4000>; reg = <0x02034000 0x4000>;
interrupts = <0 50 0x04>; interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>;
}; };
spba@0203c000 { spba@0203c000 {
...@@ -282,7 +285,8 @@ ...@@ -282,7 +285,8 @@
vpu: vpu@02040000 { vpu: vpu@02040000 {
reg = <0x02040000 0x3c000>; reg = <0x02040000 0x3c000>;
interrupts = <0 3 0x04 0 12 0x04>; interrupts = <0 3 IRQ_TYPE_LEVEL_HIGH>,
<0 12 IRQ_TYPE_LEVEL_HIGH>;
}; };
aipstz@0207c000 { /* AIPSTZ1 */ aipstz@0207c000 { /* AIPSTZ1 */
...@@ -293,7 +297,7 @@ ...@@ -293,7 +297,7 @@
#pwm-cells = <2>; #pwm-cells = <2>;
compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
reg = <0x02080000 0x4000>; reg = <0x02080000 0x4000>;
interrupts = <0 83 0x04>; interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 62>, <&clks 145>; clocks = <&clks 62>, <&clks 145>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
}; };
...@@ -302,7 +306,7 @@ ...@@ -302,7 +306,7 @@
#pwm-cells = <2>; #pwm-cells = <2>;
compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
reg = <0x02084000 0x4000>; reg = <0x02084000 0x4000>;
interrupts = <0 84 0x04>; interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 62>, <&clks 146>; clocks = <&clks 62>, <&clks 146>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
}; };
...@@ -311,7 +315,7 @@ ...@@ -311,7 +315,7 @@
#pwm-cells = <2>; #pwm-cells = <2>;
compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
reg = <0x02088000 0x4000>; reg = <0x02088000 0x4000>;
interrupts = <0 85 0x04>; interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 62>, <&clks 147>; clocks = <&clks 62>, <&clks 147>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
}; };
...@@ -320,7 +324,7 @@ ...@@ -320,7 +324,7 @@
#pwm-cells = <2>; #pwm-cells = <2>;
compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
reg = <0x0208c000 0x4000>; reg = <0x0208c000 0x4000>;
interrupts = <0 86 0x04>; interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 62>, <&clks 148>; clocks = <&clks 62>, <&clks 148>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
}; };
...@@ -328,7 +332,7 @@ ...@@ -328,7 +332,7 @@
can1: flexcan@02090000 { can1: flexcan@02090000 {
compatible = "fsl,imx6q-flexcan"; compatible = "fsl,imx6q-flexcan";
reg = <0x02090000 0x4000>; reg = <0x02090000 0x4000>;
interrupts = <0 110 0x04>; interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 108>, <&clks 109>; clocks = <&clks 108>, <&clks 109>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
status = "disabled"; status = "disabled";
...@@ -337,7 +341,7 @@ ...@@ -337,7 +341,7 @@
can2: flexcan@02094000 { can2: flexcan@02094000 {
compatible = "fsl,imx6q-flexcan"; compatible = "fsl,imx6q-flexcan";
reg = <0x02094000 0x4000>; reg = <0x02094000 0x4000>;
interrupts = <0 111 0x04>; interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 110>, <&clks 111>; clocks = <&clks 110>, <&clks 111>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
status = "disabled"; status = "disabled";
...@@ -346,7 +350,7 @@ ...@@ -346,7 +350,7 @@
gpt: gpt@02098000 { gpt: gpt@02098000 {
compatible = "fsl,imx6q-gpt", "fsl,imx31-gpt"; compatible = "fsl,imx6q-gpt", "fsl,imx31-gpt";
reg = <0x02098000 0x4000>; reg = <0x02098000 0x4000>;
interrupts = <0 55 0x04>; interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 119>, <&clks 120>; clocks = <&clks 119>, <&clks 120>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
}; };
...@@ -354,7 +358,8 @@ ...@@ -354,7 +358,8 @@
gpio1: gpio@0209c000 { gpio1: gpio@0209c000 {
compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
reg = <0x0209c000 0x4000>; reg = <0x0209c000 0x4000>;
interrupts = <0 66 0x04 0 67 0x04>; interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>,
<0 67 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-controller; interrupt-controller;
...@@ -364,7 +369,8 @@ ...@@ -364,7 +369,8 @@
gpio2: gpio@020a0000 { gpio2: gpio@020a0000 {
compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
reg = <0x020a0000 0x4000>; reg = <0x020a0000 0x4000>;
interrupts = <0 68 0x04 0 69 0x04>; interrupts = <0 68 IRQ_TYPE_LEVEL_HIGH>,
<0 69 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-controller; interrupt-controller;
...@@ -374,7 +380,8 @@ ...@@ -374,7 +380,8 @@
gpio3: gpio@020a4000 { gpio3: gpio@020a4000 {
compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
reg = <0x020a4000 0x4000>; reg = <0x020a4000 0x4000>;
interrupts = <0 70 0x04 0 71 0x04>; interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>,
<0 71 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-controller; interrupt-controller;
...@@ -384,7 +391,8 @@ ...@@ -384,7 +391,8 @@
gpio4: gpio@020a8000 { gpio4: gpio@020a8000 {
compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
reg = <0x020a8000 0x4000>; reg = <0x020a8000 0x4000>;
interrupts = <0 72 0x04 0 73 0x04>; interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>,
<0 73 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-controller; interrupt-controller;
...@@ -394,7 +402,8 @@ ...@@ -394,7 +402,8 @@
gpio5: gpio@020ac000 { gpio5: gpio@020ac000 {
compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
reg = <0x020ac000 0x4000>; reg = <0x020ac000 0x4000>;
interrupts = <0 74 0x04 0 75 0x04>; interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>,
<0 75 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-controller; interrupt-controller;
...@@ -404,7 +413,8 @@ ...@@ -404,7 +413,8 @@
gpio6: gpio@020b0000 { gpio6: gpio@020b0000 {
compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
reg = <0x020b0000 0x4000>; reg = <0x020b0000 0x4000>;
interrupts = <0 76 0x04 0 77 0x04>; interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>,
<0 77 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-controller; interrupt-controller;
...@@ -414,7 +424,8 @@ ...@@ -414,7 +424,8 @@
gpio7: gpio@020b4000 { gpio7: gpio@020b4000 {
compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
reg = <0x020b4000 0x4000>; reg = <0x020b4000 0x4000>;
interrupts = <0 78 0x04 0 79 0x04>; interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>,
<0 79 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-controller; interrupt-controller;
...@@ -423,20 +434,20 @@ ...@@ -423,20 +434,20 @@
kpp: kpp@020b8000 { kpp: kpp@020b8000 {
reg = <0x020b8000 0x4000>; reg = <0x020b8000 0x4000>;
interrupts = <0 82 0x04>; interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>;
}; };
wdog1: wdog@020bc000 { wdog1: wdog@020bc000 {
compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
reg = <0x020bc000 0x4000>; reg = <0x020bc000 0x4000>;
interrupts = <0 80 0x04>; interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 0>; clocks = <&clks 0>;
}; };
wdog2: wdog@020c0000 { wdog2: wdog@020c0000 {
compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
reg = <0x020c0000 0x4000>; reg = <0x020c0000 0x4000>;
interrupts = <0 81 0x04>; interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 0>; clocks = <&clks 0>;
status = "disabled"; status = "disabled";
}; };
...@@ -444,14 +455,17 @@ ...@@ -444,14 +455,17 @@
clks: ccm@020c4000 { clks: ccm@020c4000 {
compatible = "fsl,imx6q-ccm"; compatible = "fsl,imx6q-ccm";
reg = <0x020c4000 0x4000>; reg = <0x020c4000 0x4000>;
interrupts = <0 87 0x04 0 88 0x04>; interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>,
<0 88 IRQ_TYPE_LEVEL_HIGH>;
#clock-cells = <1>; #clock-cells = <1>;
}; };
anatop: anatop@020c8000 { anatop: anatop@020c8000 {
compatible = "fsl,imx6q-anatop", "syscon", "simple-bus"; compatible = "fsl,imx6q-anatop", "syscon", "simple-bus";
reg = <0x020c8000 0x1000>; reg = <0x020c8000 0x1000>;
interrupts = <0 49 0x04 0 54 0x04 0 127 0x04>; interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,
<0 54 IRQ_TYPE_LEVEL_HIGH>,
<0 127 IRQ_TYPE_LEVEL_HIGH>;
regulator-1p1@110 { regulator-1p1@110 {
compatible = "fsl,anatop-regulator"; compatible = "fsl,anatop-regulator";
...@@ -549,7 +563,7 @@ ...@@ -549,7 +563,7 @@
tempmon: tempmon { tempmon: tempmon {
compatible = "fsl,imx6q-tempmon"; compatible = "fsl,imx6q-tempmon";
interrupts = <0 49 0x04>; interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
fsl,tempmon = <&anatop>; fsl,tempmon = <&anatop>;
fsl,tempmon-data = <&ocotp>; fsl,tempmon-data = <&ocotp>;
}; };
...@@ -557,14 +571,14 @@ ...@@ -557,14 +571,14 @@
usbphy1: usbphy@020c9000 { usbphy1: usbphy@020c9000 {
compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
reg = <0x020c9000 0x1000>; reg = <0x020c9000 0x1000>;
interrupts = <0 44 0x04>; interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 182>; clocks = <&clks 182>;
}; };
usbphy2: usbphy@020ca000 { usbphy2: usbphy@020ca000 {
compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
reg = <0x020ca000 0x1000>; reg = <0x020ca000 0x1000>;
interrupts = <0 45 0x04>; interrupts = <0 45 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 183>; clocks = <&clks 183>;
}; };
...@@ -577,31 +591,34 @@ ...@@ -577,31 +591,34 @@
snvs-rtc-lp@34 { snvs-rtc-lp@34 {
compatible = "fsl,sec-v4.0-mon-rtc-lp"; compatible = "fsl,sec-v4.0-mon-rtc-lp";
reg = <0x34 0x58>; reg = <0x34 0x58>;
interrupts = <0 19 0x04 0 20 0x04>; interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>,
<0 20 IRQ_TYPE_LEVEL_HIGH>;
}; };
}; };
epit1: epit@020d0000 { /* EPIT1 */ epit1: epit@020d0000 { /* EPIT1 */
reg = <0x020d0000 0x4000>; reg = <0x020d0000 0x4000>;
interrupts = <0 56 0x04>; interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
}; };
epit2: epit@020d4000 { /* EPIT2 */ epit2: epit@020d4000 { /* EPIT2 */
reg = <0x020d4000 0x4000>; reg = <0x020d4000 0x4000>;
interrupts = <0 57 0x04>; interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
}; };
src: src@020d8000 { src: src@020d8000 {
compatible = "fsl,imx6q-src", "fsl,imx51-src"; compatible = "fsl,imx6q-src", "fsl,imx51-src";
reg = <0x020d8000 0x4000>; reg = <0x020d8000 0x4000>;
interrupts = <0 91 0x04 0 96 0x04>; interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>,
<0 96 IRQ_TYPE_LEVEL_HIGH>;
#reset-cells = <1>; #reset-cells = <1>;
}; };
gpc: gpc@020dc000 { gpc: gpc@020dc000 {
compatible = "fsl,imx6q-gpc"; compatible = "fsl,imx6q-gpc";
reg = <0x020dc000 0x4000>; reg = <0x020dc000 0x4000>;
interrupts = <0 89 0x04 0 90 0x04>; interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>,
<0 90 IRQ_TYPE_LEVEL_HIGH>;
}; };
gpr: iomuxc-gpr@020e0000 { gpr: iomuxc-gpr@020e0000 {
...@@ -634,18 +651,18 @@ ...@@ -634,18 +651,18 @@
dcic1: dcic@020e4000 { dcic1: dcic@020e4000 {
reg = <0x020e4000 0x4000>; reg = <0x020e4000 0x4000>;
interrupts = <0 124 0x04>; interrupts = <0 124 IRQ_TYPE_LEVEL_HIGH>;
}; };
dcic2: dcic@020e8000 { dcic2: dcic@020e8000 {
reg = <0x020e8000 0x4000>; reg = <0x020e8000 0x4000>;
interrupts = <0 125 0x04>; interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>;
}; };
sdma: sdma@020ec000 { sdma: sdma@020ec000 {
compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma"; compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma";
reg = <0x020ec000 0x4000>; reg = <0x020ec000 0x4000>;
interrupts = <0 2 0x04>; interrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 155>, <&clks 155>; clocks = <&clks 155>, <&clks 155>;
clock-names = "ipg", "ahb"; clock-names = "ipg", "ahb";
#dma-cells = <3>; #dma-cells = <3>;
...@@ -662,7 +679,8 @@ ...@@ -662,7 +679,8 @@
caam@02100000 { caam@02100000 {
reg = <0x02100000 0x40000>; reg = <0x02100000 0x40000>;
interrupts = <0 105 0x04 0 106 0x04>; interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>,
<0 106 IRQ_TYPE_LEVEL_HIGH>;
}; };
aipstz@0217c000 { /* AIPSTZ2 */ aipstz@0217c000 { /* AIPSTZ2 */
...@@ -672,7 +690,7 @@ ...@@ -672,7 +690,7 @@
usbotg: usb@02184000 { usbotg: usb@02184000 {
compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
reg = <0x02184000 0x200>; reg = <0x02184000 0x200>;
interrupts = <0 43 0x04>; interrupts = <0 43 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 162>; clocks = <&clks 162>;
fsl,usbphy = <&usbphy1>; fsl,usbphy = <&usbphy1>;
fsl,usbmisc = <&usbmisc 0>; fsl,usbmisc = <&usbmisc 0>;
...@@ -682,7 +700,7 @@ ...@@ -682,7 +700,7 @@
usbh1: usb@02184200 { usbh1: usb@02184200 {
compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
reg = <0x02184200 0x200>; reg = <0x02184200 0x200>;
interrupts = <0 40 0x04>; interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 162>; clocks = <&clks 162>;
fsl,usbphy = <&usbphy2>; fsl,usbphy = <&usbphy2>;
fsl,usbmisc = <&usbmisc 1>; fsl,usbmisc = <&usbmisc 1>;
...@@ -692,7 +710,7 @@ ...@@ -692,7 +710,7 @@
usbh2: usb@02184400 { usbh2: usb@02184400 {
compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
reg = <0x02184400 0x200>; reg = <0x02184400 0x200>;
interrupts = <0 41 0x04>; interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 162>; clocks = <&clks 162>;
fsl,usbmisc = <&usbmisc 2>; fsl,usbmisc = <&usbmisc 2>;
status = "disabled"; status = "disabled";
...@@ -701,7 +719,7 @@ ...@@ -701,7 +719,7 @@
usbh3: usb@02184600 { usbh3: usb@02184600 {
compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
reg = <0x02184600 0x200>; reg = <0x02184600 0x200>;
interrupts = <0 42 0x04>; interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 162>; clocks = <&clks 162>;
fsl,usbmisc = <&usbmisc 3>; fsl,usbmisc = <&usbmisc 3>;
status = "disabled"; status = "disabled";
...@@ -717,7 +735,8 @@ ...@@ -717,7 +735,8 @@
fec: ethernet@02188000 { fec: ethernet@02188000 {
compatible = "fsl,imx6q-fec"; compatible = "fsl,imx6q-fec";
reg = <0x02188000 0x4000>; reg = <0x02188000 0x4000>;
interrupts = <0 118 0x04 0 119 0x04>; interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>,
<0 119 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 117>, <&clks 117>, <&clks 190>; clocks = <&clks 117>, <&clks 117>, <&clks 190>;
clock-names = "ipg", "ahb", "ptp"; clock-names = "ipg", "ahb", "ptp";
status = "disabled"; status = "disabled";
...@@ -725,13 +744,15 @@ ...@@ -725,13 +744,15 @@
mlb@0218c000 { mlb@0218c000 {
reg = <0x0218c000 0x4000>; reg = <0x0218c000 0x4000>;
interrupts = <0 53 0x04 0 117 0x04 0 126 0x04>; interrupts = <0 53 IRQ_TYPE_LEVEL_HIGH>,
<0 117 IRQ_TYPE_LEVEL_HIGH>,
<0 126 IRQ_TYPE_LEVEL_HIGH>;
}; };
usdhc1: usdhc@02190000 { usdhc1: usdhc@02190000 {
compatible = "fsl,imx6q-usdhc"; compatible = "fsl,imx6q-usdhc";
reg = <0x02190000 0x4000>; reg = <0x02190000 0x4000>;
interrupts = <0 22 0x04>; interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 163>, <&clks 163>, <&clks 163>; clocks = <&clks 163>, <&clks 163>, <&clks 163>;
clock-names = "ipg", "ahb", "per"; clock-names = "ipg", "ahb", "per";
bus-width = <4>; bus-width = <4>;
...@@ -741,7 +762,7 @@ ...@@ -741,7 +762,7 @@
usdhc2: usdhc@02194000 { usdhc2: usdhc@02194000 {
compatible = "fsl,imx6q-usdhc"; compatible = "fsl,imx6q-usdhc";
reg = <0x02194000 0x4000>; reg = <0x02194000 0x4000>;
interrupts = <0 23 0x04>; interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 164>, <&clks 164>, <&clks 164>; clocks = <&clks 164>, <&clks 164>, <&clks 164>;
clock-names = "ipg", "ahb", "per"; clock-names = "ipg", "ahb", "per";
bus-width = <4>; bus-width = <4>;
...@@ -751,7 +772,7 @@ ...@@ -751,7 +772,7 @@
usdhc3: usdhc@02198000 { usdhc3: usdhc@02198000 {
compatible = "fsl,imx6q-usdhc"; compatible = "fsl,imx6q-usdhc";
reg = <0x02198000 0x4000>; reg = <0x02198000 0x4000>;
interrupts = <0 24 0x04>; interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 165>, <&clks 165>, <&clks 165>; clocks = <&clks 165>, <&clks 165>, <&clks 165>;
clock-names = "ipg", "ahb", "per"; clock-names = "ipg", "ahb", "per";
bus-width = <4>; bus-width = <4>;
...@@ -761,7 +782,7 @@ ...@@ -761,7 +782,7 @@
usdhc4: usdhc@0219c000 { usdhc4: usdhc@0219c000 {
compatible = "fsl,imx6q-usdhc"; compatible = "fsl,imx6q-usdhc";
reg = <0x0219c000 0x4000>; reg = <0x0219c000 0x4000>;
interrupts = <0 25 0x04>; interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 166>, <&clks 166>, <&clks 166>; clocks = <&clks 166>, <&clks 166>, <&clks 166>;
clock-names = "ipg", "ahb", "per"; clock-names = "ipg", "ahb", "per";
bus-width = <4>; bus-width = <4>;
...@@ -773,7 +794,7 @@ ...@@ -773,7 +794,7 @@
#size-cells = <0>; #size-cells = <0>;
compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
reg = <0x021a0000 0x4000>; reg = <0x021a0000 0x4000>;
interrupts = <0 36 0x04>; interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 125>; clocks = <&clks 125>;
status = "disabled"; status = "disabled";
}; };
...@@ -783,7 +804,7 @@ ...@@ -783,7 +804,7 @@
#size-cells = <0>; #size-cells = <0>;
compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
reg = <0x021a4000 0x4000>; reg = <0x021a4000 0x4000>;
interrupts = <0 37 0x04>; interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 126>; clocks = <&clks 126>;
status = "disabled"; status = "disabled";
}; };
...@@ -793,7 +814,7 @@ ...@@ -793,7 +814,7 @@
#size-cells = <0>; #size-cells = <0>;
compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
reg = <0x021a8000 0x4000>; reg = <0x021a8000 0x4000>;
interrupts = <0 38 0x04>; interrupts = <0 38 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 127>; clocks = <&clks 127>;
status = "disabled"; status = "disabled";
}; };
...@@ -814,7 +835,7 @@ ...@@ -814,7 +835,7 @@
weim: weim@021b8000 { weim: weim@021b8000 {
compatible = "fsl,imx6q-weim"; compatible = "fsl,imx6q-weim";
reg = <0x021b8000 0x4000>; reg = <0x021b8000 0x4000>;
interrupts = <0 14 0x04>; interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 196>; clocks = <&clks 196>;
}; };
...@@ -825,12 +846,12 @@ ...@@ -825,12 +846,12 @@
tzasc@021d0000 { /* TZASC1 */ tzasc@021d0000 { /* TZASC1 */
reg = <0x021d0000 0x4000>; reg = <0x021d0000 0x4000>;
interrupts = <0 108 0x04>; interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
}; };
tzasc@021d4000 { /* TZASC2 */ tzasc@021d4000 { /* TZASC2 */
reg = <0x021d4000 0x4000>; reg = <0x021d4000 0x4000>;
interrupts = <0 109 0x04>; interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
}; };
audmux: audmux@021d8000 { audmux: audmux@021d8000 {
...@@ -849,13 +870,13 @@ ...@@ -849,13 +870,13 @@
vdoa@021e4000 { vdoa@021e4000 {
reg = <0x021e4000 0x4000>; reg = <0x021e4000 0x4000>;
interrupts = <0 18 0x04>; interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;
}; };
uart2: serial@021e8000 { uart2: serial@021e8000 {
compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x021e8000 0x4000>; reg = <0x021e8000 0x4000>;
interrupts = <0 27 0x04>; interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 160>, <&clks 161>; clocks = <&clks 160>, <&clks 161>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
dmas = <&sdma 27 4 0>, <&sdma 28 4 0>; dmas = <&sdma 27 4 0>, <&sdma 28 4 0>;
...@@ -866,7 +887,7 @@ ...@@ -866,7 +887,7 @@
uart3: serial@021ec000 { uart3: serial@021ec000 {
compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x021ec000 0x4000>; reg = <0x021ec000 0x4000>;
interrupts = <0 28 0x04>; interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 160>, <&clks 161>; clocks = <&clks 160>, <&clks 161>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
dmas = <&sdma 29 4 0>, <&sdma 30 4 0>; dmas = <&sdma 29 4 0>, <&sdma 30 4 0>;
...@@ -877,7 +898,7 @@ ...@@ -877,7 +898,7 @@
uart4: serial@021f0000 { uart4: serial@021f0000 {
compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x021f0000 0x4000>; reg = <0x021f0000 0x4000>;
interrupts = <0 29 0x04>; interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 160>, <&clks 161>; clocks = <&clks 160>, <&clks 161>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
dmas = <&sdma 31 4 0>, <&sdma 32 4 0>; dmas = <&sdma 31 4 0>, <&sdma 32 4 0>;
...@@ -888,7 +909,7 @@ ...@@ -888,7 +909,7 @@
uart5: serial@021f4000 { uart5: serial@021f4000 {
compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x021f4000 0x4000>; reg = <0x021f4000 0x4000>;
interrupts = <0 30 0x04>; interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 160>, <&clks 161>; clocks = <&clks 160>, <&clks 161>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
dmas = <&sdma 33 4 0>, <&sdma 34 4 0>; dmas = <&sdma 33 4 0>, <&sdma 34 4 0>;
...@@ -901,7 +922,8 @@ ...@@ -901,7 +922,8 @@
#crtc-cells = <1>; #crtc-cells = <1>;
compatible = "fsl,imx6q-ipu"; compatible = "fsl,imx6q-ipu";
reg = <0x02400000 0x400000>; reg = <0x02400000 0x400000>;
interrupts = <0 6 0x4 0 5 0x4>; interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>,
<0 5 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 130>, <&clks 131>, <&clks 132>; clocks = <&clks 130>, <&clks 131>, <&clks 132>;
clock-names = "bus", "di0", "di1"; clock-names = "bus", "di0", "di1";
resets = <&src 2>; resets = <&src 2>;
......
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