drm/amd/display: fix 4to1 odm MPC_OUT_FLOW_CONTROL_COUNT

Signed-off-by: NDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: NChris Park <Chris.Park@amd.com>
Acked-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c

@@ -618,7 +618,7 @@ static int calc_mpc_flow_ctrl_cnt(const struct dc_stream_state *stream,
 	bool hblank_halved = optc2_is_two_pixels_per_containter(&stream->timing);
 	int flow_ctrl_cnt;
 
-	if (opp_cnt == 2)
+	if (opp_cnt >= 2)
 		hblank_halved = true;
 
 	flow_ctrl_cnt = stream->timing.h_total - stream->timing.h_addressable -