crypto: qat - remove hardcoded bank irq clear flag mask

Replace hardcoded value of the bank interrupt clear flag mask with a
value calculated on the fly which is based on the number of rings
present in a bank. This is to support devices that have a number of
rings per bank different than 16.
Signed-off-by: NGiovanni Cabiddu <giovanni.cabiddu@intel.com>
Reviewed-by: NWojciech Ziemba <wojciech.ziemba@intel.com>
Reviewed-by: NFiona Trahe <fiona.trahe@intel.com>
Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

drivers/crypto/qat/qat_common/adf_transport.c

@@ -374,6 +374,7 @@ static int adf_init_bank(struct adf_accel_dev *accel_dev,
 	struct adf_hw_device_data *hw_data = accel_dev->hw_device;
 	u8 num_rings_per_bank = hw_data->num_rings_per_bank;
 	struct adf_hw_csr_ops *csr_ops = &hw_data->csr_ops;
+	u32 irq_mask = BIT(num_rings_per_bank) - 1;
 	struct adf_etr_ring_data *ring;
 	struct adf_etr_ring_data *tx_ring;
 	u32 i, coalesc_enabled = 0;
@@ -431,8 +432,7 @@ static int adf_init_bank(struct adf_accel_dev *accel_dev,
 		goto err;
 	}
 
-	csr_ops->write_csr_int_flag(csr_addr, bank_num,
-				    ADF_BANK_INT_FLAG_CLEAR_MASK);
+	csr_ops->write_csr_int_flag(csr_addr, bank_num, irq_mask);
 	csr_ops->write_csr_int_srcsel(csr_addr, bank_num);
 
 	return 0;

drivers/crypto/qat/qat_common/adf_transport_access_macros.h

@@ -4,7 +4,6 @@
 #define ADF_TRANSPORT_ACCESS_MACROS_H
 
 #include "adf_accel_devices.h"
-#define ADF_BANK_INT_FLAG_CLEAR_MASK 0xFFFF
 #define ADF_RING_CONFIG_NEAR_FULL_WM 0x0A
 #define ADF_RING_CONFIG_NEAR_EMPTY_WM 0x05
 #define ADF_COALESCING_MIN_TIME 0x1FF