提交 2255e8c1 编写于 作者: A Alex Deucher

drm/amdgpu/si: fix ring size for compute

We switched the other asics, but missed this.
Reviewed-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
上级 72f417a2
......@@ -2779,7 +2779,7 @@ static int gfx_v6_0_sw_init(void *handle)
ring->queue = i;
sprintf(ring->name, "comp %d.%d.%d", ring->me, ring->pipe, ring->queue);
irq_type = AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP + ring->pipe;
r = amdgpu_ring_init(adev, ring, 1024 * 1024,
r = amdgpu_ring_init(adev, ring, 1024,
0x80000000, 0xf,
&adev->gfx.eop_irq, irq_type,
AMDGPU_RING_TYPE_COMPUTE);
......
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