提交 22411396 编写于 作者: P Paul Walmsley

OMAP2xxx: clock: remove dsp_irate_ick

After commit 81b34fbe ("OMAP2 clock:
split OMAP2420, OMAP2430 clock data into their own files"), it's
possible to remove dsp_irate_ick from the OMAP2420 and OMAP2430 clock
files.  It was originally only needed due to a 2420/2430 clock tree difference,
and now that the data is in separate files, it's superfluous.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
上级 241d3a8d
...@@ -139,6 +139,7 @@ extern struct clk *vclk, *sclk; ...@@ -139,6 +139,7 @@ extern struct clk *vclk, *sclk;
extern const struct clksel_rate gpt_32k_rates[]; extern const struct clksel_rate gpt_32k_rates[];
extern const struct clksel_rate gpt_sys_rates[]; extern const struct clksel_rate gpt_sys_rates[];
extern const struct clksel_rate gfx_l3_rates[]; extern const struct clksel_rate gfx_l3_rates[];
extern const struct clksel_rate dsp_ick_rates[];
#if defined(CONFIG_ARCH_OMAP2) && defined(CONFIG_CPU_FREQ) #if defined(CONFIG_ARCH_OMAP2) && defined(CONFIG_CPU_FREQ)
extern void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table); extern void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table);
......
...@@ -454,36 +454,22 @@ static struct clk dsp_fck = { ...@@ -454,36 +454,22 @@ static struct clk dsp_fck = {
.recalc = &omap2_clksel_recalc, .recalc = &omap2_clksel_recalc,
}; };
/* DSP interface clock */ static const struct clksel dsp_ick_clksel[] = {
static const struct clksel_rate dsp_irate_ick_rates[] = { { .parent = &dsp_fck, .rates = dsp_ick_rates },
{ .div = 1, .val = 1, .flags = RATE_IN_24XX },
{ .div = 2, .val = 2, .flags = RATE_IN_24XX },
{ .div = 0 },
};
static const struct clksel dsp_irate_ick_clksel[] = {
{ .parent = &dsp_fck, .rates = dsp_irate_ick_rates },
{ .parent = NULL } { .parent = NULL }
}; };
/* This clock does not exist as such in the TRM. */
static struct clk dsp_irate_ick = {
.name = "dsp_irate_ick",
.ops = &clkops_null,
.parent = &dsp_fck,
.clksel_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_CLKSEL),
.clksel_mask = OMAP24XX_CLKSEL_DSP_IF_MASK,
.clksel = dsp_irate_ick_clksel,
.recalc = &omap2_clksel_recalc,
};
/* 2420 only */
static struct clk dsp_ick = { static struct clk dsp_ick = {
.name = "dsp_ick", /* apparently ipi and isp */ .name = "dsp_ick", /* apparently ipi and isp */
.ops = &clkops_omap2_iclk_dflt_wait, .ops = &clkops_omap2_iclk_dflt_wait,
.parent = &dsp_irate_ick, .parent = &dsp_fck,
.clkdm_name = "dsp_clkdm",
.enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_ICLKEN), .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_ICLKEN),
.enable_bit = OMAP2420_EN_DSP_IPI_SHIFT, /* for ipi */ .enable_bit = OMAP2420_EN_DSP_IPI_SHIFT, /* for ipi */
.clksel_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_CLKSEL),
.clksel_mask = OMAP24XX_CLKSEL_DSP_IF_MASK,
.clksel = dsp_ick_clksel,
.recalc = &omap2_clksel_recalc,
}; };
/* /*
...@@ -1812,7 +1798,6 @@ static struct omap_clk omap2420_clks[] = { ...@@ -1812,7 +1798,6 @@ static struct omap_clk omap2420_clks[] = {
CLK(NULL, "mpu_ck", &mpu_ck, CK_242X), CLK(NULL, "mpu_ck", &mpu_ck, CK_242X),
/* dsp domain clocks */ /* dsp domain clocks */
CLK(NULL, "dsp_fck", &dsp_fck, CK_242X), CLK(NULL, "dsp_fck", &dsp_fck, CK_242X),
CLK(NULL, "dsp_irate_ick", &dsp_irate_ick, CK_242X),
CLK(NULL, "dsp_ick", &dsp_ick, CK_242X), CLK(NULL, "dsp_ick", &dsp_ick, CK_242X),
CLK(NULL, "iva1_ifck", &iva1_ifck, CK_242X), CLK(NULL, "iva1_ifck", &iva1_ifck, CK_242X),
CLK(NULL, "iva1_mpu_int_ifck", &iva1_mpu_int_ifck, CK_242X), CLK(NULL, "iva1_mpu_int_ifck", &iva1_mpu_int_ifck, CK_242X),
......
...@@ -433,37 +433,23 @@ static struct clk dsp_fck = { ...@@ -433,37 +433,23 @@ static struct clk dsp_fck = {
.recalc = &omap2_clksel_recalc, .recalc = &omap2_clksel_recalc,
}; };
/* DSP interface clock */ static const struct clksel dsp_ick_clksel[] = {
static const struct clksel_rate dsp_irate_ick_rates[] = { { .parent = &dsp_fck, .rates = dsp_ick_rates },
{ .div = 1, .val = 1, .flags = RATE_IN_24XX },
{ .div = 2, .val = 2, .flags = RATE_IN_24XX },
{ .div = 3, .val = 3, .flags = RATE_IN_243X },
{ .div = 0 },
};
static const struct clksel dsp_irate_ick_clksel[] = {
{ .parent = &dsp_fck, .rates = dsp_irate_ick_rates },
{ .parent = NULL } { .parent = NULL }
}; };
/* This clock does not exist as such in the TRM. */
static struct clk dsp_irate_ick = {
.name = "dsp_irate_ick",
.ops = &clkops_null,
.parent = &dsp_fck,
.clksel_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_CLKSEL),
.clksel_mask = OMAP24XX_CLKSEL_DSP_IF_MASK,
.clksel = dsp_irate_ick_clksel,
.recalc = &omap2_clksel_recalc,
};
/* 2430 only - EN_DSP controls both dsp fclk and iclk on 2430 */ /* 2430 only - EN_DSP controls both dsp fclk and iclk on 2430 */
static struct clk iva2_1_ick = { static struct clk iva2_1_ick = {
.name = "iva2_1_ick", .name = "iva2_1_ick",
.ops = &clkops_omap2_dflt_wait, .ops = &clkops_omap2_dflt_wait,
.parent = &dsp_irate_ick, .parent = &dsp_fck,
.clkdm_name = "dsp_clkdm",
.enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN), .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN),
.enable_bit = OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT, .enable_bit = OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT,
.clksel_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_CLKSEL),
.clksel_mask = OMAP24XX_CLKSEL_DSP_IF_MASK,
.clksel = dsp_ick_clksel,
.recalc = &omap2_clksel_recalc,
}; };
/* /*
...@@ -1900,7 +1886,6 @@ static struct omap_clk omap2430_clks[] = { ...@@ -1900,7 +1886,6 @@ static struct omap_clk omap2430_clks[] = {
CLK(NULL, "mpu_ck", &mpu_ck, CK_243X), CLK(NULL, "mpu_ck", &mpu_ck, CK_243X),
/* dsp domain clocks */ /* dsp domain clocks */
CLK(NULL, "dsp_fck", &dsp_fck, CK_243X), CLK(NULL, "dsp_fck", &dsp_fck, CK_243X),
CLK(NULL, "dsp_irate_ick", &dsp_irate_ick, CK_243X),
CLK(NULL, "iva2_1_ick", &iva2_1_ick, CK_243X), CLK(NULL, "iva2_1_ick", &iva2_1_ick, CK_243X),
/* GFX domain clocks */ /* GFX domain clocks */
CLK(NULL, "gfx_3d_fck", &gfx_3d_fck, CK_243X), CLK(NULL, "gfx_3d_fck", &gfx_3d_fck, CK_243X),
......
...@@ -37,3 +37,9 @@ const struct clksel_rate gfx_l3_rates[] = { ...@@ -37,3 +37,9 @@ const struct clksel_rate gfx_l3_rates[] = {
{ .div = 0 } { .div = 0 }
}; };
const struct clksel_rate dsp_ick_rates[] = {
{ .div = 1, .val = 1, .flags = RATE_IN_24XX },
{ .div = 2, .val = 2, .flags = RATE_IN_24XX },
{ .div = 3, .val = 3, .flags = RATE_IN_243X },
{ .div = 0 },
};
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