提交 1ee6dd77 编写于 作者: R Ralf Baechle 提交者: Jeff Garzik

s2io: De-typedef driver.

Removed namespace collisions due to usage of nic_t as per Ralf's patch
Signed-off-by: NSivakumar Subramani <sivakumar.subramani@neterion.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>
上级 a113ae06
...@@ -15,7 +15,7 @@ ...@@ -15,7 +15,7 @@
#define TBD 0 #define TBD 0
typedef struct _XENA_dev_config { struct XENA_dev_config {
/* Convention: mHAL_XXX is mask, vHAL_XXX is value */ /* Convention: mHAL_XXX is mask, vHAL_XXX is value */
/* General Control-Status Registers */ /* General Control-Status Registers */
...@@ -852,9 +852,9 @@ typedef struct _XENA_dev_config { ...@@ -852,9 +852,9 @@ typedef struct _XENA_dev_config {
#define SPI_CONTROL_DONE BIT(6) #define SPI_CONTROL_DONE BIT(6)
u64 spi_data; u64 spi_data;
#define SPI_DATA_WRITE(data,len) vBIT(data,0,len) #define SPI_DATA_WRITE(data,len) vBIT(data,0,len)
} XENA_dev_config_t; };
#define XENA_REG_SPACE sizeof(XENA_dev_config_t) #define XENA_REG_SPACE sizeof(struct XENA_dev_config)
#define XENA_EEPROM_SPACE (0x01 << 11) #define XENA_EEPROM_SPACE (0x01 << 11)
#endif /* _REGS_H */ #endif /* _REGS_H */
此差异已折叠。
...@@ -39,7 +39,7 @@ ...@@ -39,7 +39,7 @@
#define MAX_FLICKER_TIME 60000 /* 60 Secs */ #define MAX_FLICKER_TIME 60000 /* 60 Secs */
/* Maximum outstanding splits to be configured into xena. */ /* Maximum outstanding splits to be configured into xena. */
typedef enum xena_max_outstanding_splits { enum {
XENA_ONE_SPLIT_TRANSACTION = 0, XENA_ONE_SPLIT_TRANSACTION = 0,
XENA_TWO_SPLIT_TRANSACTION = 1, XENA_TWO_SPLIT_TRANSACTION = 1,
XENA_THREE_SPLIT_TRANSACTION = 2, XENA_THREE_SPLIT_TRANSACTION = 2,
...@@ -48,7 +48,7 @@ typedef enum xena_max_outstanding_splits { ...@@ -48,7 +48,7 @@ typedef enum xena_max_outstanding_splits {
XENA_TWELVE_SPLIT_TRANSACTION = 5, XENA_TWELVE_SPLIT_TRANSACTION = 5,
XENA_SIXTEEN_SPLIT_TRANSACTION = 6, XENA_SIXTEEN_SPLIT_TRANSACTION = 6,
XENA_THIRTYTWO_SPLIT_TRANSACTION = 7 XENA_THIRTYTWO_SPLIT_TRANSACTION = 7
} xena_max_outstanding_splits; };
#define XENA_MAX_OUTSTANDING_SPLITS(n) (n << 4) #define XENA_MAX_OUTSTANDING_SPLITS(n) (n << 4)
/* OS concerned variables and constants */ /* OS concerned variables and constants */
...@@ -79,7 +79,7 @@ static int debug_level = ERR_DBG; ...@@ -79,7 +79,7 @@ static int debug_level = ERR_DBG;
#define S2IO_JUMBO_SIZE 9600 #define S2IO_JUMBO_SIZE 9600
/* Driver statistics maintained by driver */ /* Driver statistics maintained by driver */
typedef struct { struct swStat {
unsigned long long single_ecc_errs; unsigned long long single_ecc_errs;
unsigned long long double_ecc_errs; unsigned long long double_ecc_errs;
unsigned long long parity_err_cnt; unsigned long long parity_err_cnt;
...@@ -94,10 +94,10 @@ typedef struct { ...@@ -94,10 +94,10 @@ typedef struct {
unsigned long long flush_max_pkts; unsigned long long flush_max_pkts;
unsigned long long sum_avg_pkts_aggregated; unsigned long long sum_avg_pkts_aggregated;
unsigned long long num_aggregations; unsigned long long num_aggregations;
} swStat_t; };
/* Xpak releated alarm and warnings */ /* Xpak releated alarm and warnings */
typedef struct { struct xpakStat {
u64 alarm_transceiver_temp_high; u64 alarm_transceiver_temp_high;
u64 alarm_transceiver_temp_low; u64 alarm_transceiver_temp_low;
u64 alarm_laser_bias_current_high; u64 alarm_laser_bias_current_high;
...@@ -112,11 +112,11 @@ typedef struct { ...@@ -112,11 +112,11 @@ typedef struct {
u64 warn_laser_output_power_low; u64 warn_laser_output_power_low;
u64 xpak_regs_stat; u64 xpak_regs_stat;
u32 xpak_timer_count; u32 xpak_timer_count;
} xpakStat_t; };
/* The statistics block of Xena */ /* The statistics block of Xena */
typedef struct stat_block { struct stat_block {
/* Tx MAC statistics counters. */ /* Tx MAC statistics counters. */
__le32 tmac_data_octets; __le32 tmac_data_octets;
__le32 tmac_frms; __le32 tmac_frms;
...@@ -292,9 +292,9 @@ typedef struct stat_block { ...@@ -292,9 +292,9 @@ typedef struct stat_block {
__le32 reserved_14; __le32 reserved_14;
__le32 link_fault_cnt; __le32 link_fault_cnt;
u8 buffer[20]; u8 buffer[20];
swStat_t sw_stat; struct swStat sw_stat;
xpakStat_t xpak_stat; struct xpakStat xpak_stat;
} StatInfo_t; };
/* /*
* Structures representing different init time configuration * Structures representing different init time configuration
...@@ -317,7 +317,7 @@ static int fifo_map[][MAX_TX_FIFOS] = { ...@@ -317,7 +317,7 @@ static int fifo_map[][MAX_TX_FIFOS] = {
}; };
/* Maintains Per FIFO related information. */ /* Maintains Per FIFO related information. */
typedef struct tx_fifo_config { struct tx_fifo_config {
#define MAX_AVAILABLE_TXDS 8192 #define MAX_AVAILABLE_TXDS 8192
u32 fifo_len; /* specifies len of FIFO upto 8192, ie no of TxDLs */ u32 fifo_len; /* specifies len of FIFO upto 8192, ie no of TxDLs */
/* Priority definition */ /* Priority definition */
...@@ -334,11 +334,11 @@ typedef struct tx_fifo_config { ...@@ -334,11 +334,11 @@ typedef struct tx_fifo_config {
u8 f_no_snoop; u8 f_no_snoop;
#define NO_SNOOP_TXD 0x01 #define NO_SNOOP_TXD 0x01
#define NO_SNOOP_TXD_BUFFER 0x02 #define NO_SNOOP_TXD_BUFFER 0x02
} tx_fifo_config_t; };
/* Maintains per Ring related information */ /* Maintains per Ring related information */
typedef struct rx_ring_config { struct rx_ring_config {
u32 num_rxd; /*No of RxDs per Rx Ring */ u32 num_rxd; /*No of RxDs per Rx Ring */
#define RX_RING_PRI_0 0 /* highest */ #define RX_RING_PRI_0 0 /* highest */
#define RX_RING_PRI_1 1 #define RX_RING_PRI_1 1
...@@ -359,7 +359,7 @@ typedef struct rx_ring_config { ...@@ -359,7 +359,7 @@ typedef struct rx_ring_config {
u8 f_no_snoop; u8 f_no_snoop;
#define NO_SNOOP_RXD 0x01 #define NO_SNOOP_RXD 0x01
#define NO_SNOOP_RXD_BUFFER 0x02 #define NO_SNOOP_RXD_BUFFER 0x02
} rx_ring_config_t; };
/* This structure provides contains values of the tunable parameters /* This structure provides contains values of the tunable parameters
* of the H/W * of the H/W
...@@ -369,7 +369,7 @@ struct config_param { ...@@ -369,7 +369,7 @@ struct config_param {
u32 tx_fifo_num; /*Number of Tx FIFOs */ u32 tx_fifo_num; /*Number of Tx FIFOs */
u8 fifo_mapping[MAX_TX_FIFOS]; u8 fifo_mapping[MAX_TX_FIFOS];
tx_fifo_config_t tx_cfg[MAX_TX_FIFOS]; /*Per-Tx FIFO config */ struct tx_fifo_config tx_cfg[MAX_TX_FIFOS]; /*Per-Tx FIFO config */
u32 max_txds; /*Max no. of Tx buffer descriptor per TxDL */ u32 max_txds; /*Max no. of Tx buffer descriptor per TxDL */
u64 tx_intr_type; u64 tx_intr_type;
/* Specifies if Tx Intr is UTILZ or PER_LIST type. */ /* Specifies if Tx Intr is UTILZ or PER_LIST type. */
...@@ -378,7 +378,7 @@ struct config_param { ...@@ -378,7 +378,7 @@ struct config_param {
u32 rx_ring_num; /*Number of receive rings */ u32 rx_ring_num; /*Number of receive rings */
#define MAX_RX_BLOCKS_PER_RING 150 #define MAX_RX_BLOCKS_PER_RING 150
rx_ring_config_t rx_cfg[MAX_RX_RINGS]; /*Per-Rx Ring config */ struct rx_ring_config rx_cfg[MAX_RX_RINGS]; /*Per-Rx Ring config */
u8 bimodal; /*Flag for setting bimodal interrupts*/ u8 bimodal; /*Flag for setting bimodal interrupts*/
#define HEADER_ETHERNET_II_802_3_SIZE 14 #define HEADER_ETHERNET_II_802_3_SIZE 14
...@@ -397,14 +397,14 @@ struct config_param { ...@@ -397,14 +397,14 @@ struct config_param {
}; };
/* Structure representing MAC Addrs */ /* Structure representing MAC Addrs */
typedef struct mac_addr { struct mac_addr {
u8 mac_addr[ETH_ALEN]; u8 mac_addr[ETH_ALEN];
} macaddr_t; };
/* Structure that represent every FIFO element in the BAR1 /* Structure that represent every FIFO element in the BAR1
* Address location. * Address location.
*/ */
typedef struct _TxFIFO_element { struct TxFIFO_element {
u64 TxDL_Pointer; u64 TxDL_Pointer;
u64 List_Control; u64 List_Control;
...@@ -415,10 +415,10 @@ typedef struct _TxFIFO_element { ...@@ -415,10 +415,10 @@ typedef struct _TxFIFO_element {
#define TX_FIFO_SPECIAL_FUNC BIT(23) #define TX_FIFO_SPECIAL_FUNC BIT(23)
#define TX_FIFO_DS_NO_SNOOP BIT(31) #define TX_FIFO_DS_NO_SNOOP BIT(31)
#define TX_FIFO_BUFF_NO_SNOOP BIT(30) #define TX_FIFO_BUFF_NO_SNOOP BIT(30)
} TxFIFO_element_t; };
/* Tx descriptor structure */ /* Tx descriptor structure */
typedef struct _TxD { struct TxD {
u64 Control_1; u64 Control_1;
/* bit mask */ /* bit mask */
#define TXD_LIST_OWN_XENA BIT(7) #define TXD_LIST_OWN_XENA BIT(7)
...@@ -449,16 +449,16 @@ typedef struct _TxD { ...@@ -449,16 +449,16 @@ typedef struct _TxD {
u64 Buffer_Pointer; u64 Buffer_Pointer;
u64 Host_Control; /* reserved for host */ u64 Host_Control; /* reserved for host */
} TxD_t; };
/* Structure to hold the phy and virt addr of every TxDL. */ /* Structure to hold the phy and virt addr of every TxDL. */
typedef struct list_info_hold { struct list_info_hold {
dma_addr_t list_phy_addr; dma_addr_t list_phy_addr;
void *list_virt_addr; void *list_virt_addr;
} list_info_hold_t; };
/* Rx descriptor structure for 1 buffer mode */ /* Rx descriptor structure for 1 buffer mode */
typedef struct _RxD_t { struct RxD_t {
u64 Host_Control; /* reserved for host */ u64 Host_Control; /* reserved for host */
u64 Control_1; u64 Control_1;
#define RXD_OWN_XENA BIT(7) #define RXD_OWN_XENA BIT(7)
...@@ -483,21 +483,21 @@ typedef struct _RxD_t { ...@@ -483,21 +483,21 @@ typedef struct _RxD_t {
#define SET_NUM_TAG(val) vBIT(val,16,32) #define SET_NUM_TAG(val) vBIT(val,16,32)
} RxD_t; };
/* Rx descriptor structure for 1 buffer mode */ /* Rx descriptor structure for 1 buffer mode */
typedef struct _RxD1_t { struct RxD1 {
struct _RxD_t h; struct RxD_t h;
#define MASK_BUFFER0_SIZE_1 vBIT(0x3FFF,2,14) #define MASK_BUFFER0_SIZE_1 vBIT(0x3FFF,2,14)
#define SET_BUFFER0_SIZE_1(val) vBIT(val,2,14) #define SET_BUFFER0_SIZE_1(val) vBIT(val,2,14)
#define RXD_GET_BUFFER0_SIZE_1(_Control_2) \ #define RXD_GET_BUFFER0_SIZE_1(_Control_2) \
(u16)((_Control_2 & MASK_BUFFER0_SIZE_1) >> 48) (u16)((_Control_2 & MASK_BUFFER0_SIZE_1) >> 48)
u64 Buffer0_ptr; u64 Buffer0_ptr;
} RxD1_t; };
/* Rx descriptor structure for 3 or 2 buffer mode */ /* Rx descriptor structure for 3 or 2 buffer mode */
typedef struct _RxD3_t { struct RxD3 {
struct _RxD_t h; struct RxD_t h;
#define MASK_BUFFER0_SIZE_3 vBIT(0xFF,2,14) #define MASK_BUFFER0_SIZE_3 vBIT(0xFF,2,14)
#define MASK_BUFFER1_SIZE_3 vBIT(0xFFFF,16,16) #define MASK_BUFFER1_SIZE_3 vBIT(0xFFFF,16,16)
...@@ -517,15 +517,15 @@ typedef struct _RxD3_t { ...@@ -517,15 +517,15 @@ typedef struct _RxD3_t {
u64 Buffer0_ptr; u64 Buffer0_ptr;
u64 Buffer1_ptr; u64 Buffer1_ptr;
u64 Buffer2_ptr; u64 Buffer2_ptr;
} RxD3_t; };
/* Structure that represents the Rx descriptor block which contains /* Structure that represents the Rx descriptor block which contains
* 128 Rx descriptors. * 128 Rx descriptors.
*/ */
typedef struct _RxD_block { struct RxD_block {
#define MAX_RXDS_PER_BLOCK_1 127 #define MAX_RXDS_PER_BLOCK_1 127
RxD1_t rxd[MAX_RXDS_PER_BLOCK_1]; struct RxD1 rxd[MAX_RXDS_PER_BLOCK_1];
u64 reserved_0; u64 reserved_0;
#define END_OF_BLOCK 0xFEFFFFFFFFFFFFFFULL #define END_OF_BLOCK 0xFEFFFFFFFFFFFFFFULL
...@@ -535,7 +535,7 @@ typedef struct _RxD_block { ...@@ -535,7 +535,7 @@ typedef struct _RxD_block {
u64 pNext_RxD_Blk_physical; /* Buff0_ptr.In a 32 bit arch u64 pNext_RxD_Blk_physical; /* Buff0_ptr.In a 32 bit arch
* the upper 32 bits should * the upper 32 bits should
* be 0 */ * be 0 */
} RxD_block_t; };
#define SIZE_OF_BLOCK 4096 #define SIZE_OF_BLOCK 4096
...@@ -545,12 +545,12 @@ typedef struct _RxD_block { ...@@ -545,12 +545,12 @@ typedef struct _RxD_block {
/* Structure to hold virtual addresses of Buf0 and Buf1 in /* Structure to hold virtual addresses of Buf0 and Buf1 in
* 2buf mode. */ * 2buf mode. */
typedef struct bufAdd { struct buffAdd {
void *ba_0_org; void *ba_0_org;
void *ba_1_org; void *ba_1_org;
void *ba_0; void *ba_0;
void *ba_1; void *ba_1;
} buffAdd_t; };
/* Structure which stores all the MAC control parameters */ /* Structure which stores all the MAC control parameters */
...@@ -558,43 +558,46 @@ typedef struct bufAdd { ...@@ -558,43 +558,46 @@ typedef struct bufAdd {
* from which the Rx Interrupt processor can start picking * from which the Rx Interrupt processor can start picking
* up the RxDs for processing. * up the RxDs for processing.
*/ */
typedef struct _rx_curr_get_info_t { struct rx_curr_get_info {
u32 block_index; u32 block_index;
u32 offset; u32 offset;
u32 ring_len; u32 ring_len;
} rx_curr_get_info_t; };
typedef rx_curr_get_info_t rx_curr_put_info_t; struct rx_curr_put_info {
u32 block_index;
u32 offset;
u32 ring_len;
};
/* This structure stores the offset of the TxDl in the FIFO /* This structure stores the offset of the TxDl in the FIFO
* from which the Tx Interrupt processor can start picking * from which the Tx Interrupt processor can start picking
* up the TxDLs for send complete interrupt processing. * up the TxDLs for send complete interrupt processing.
*/ */
typedef struct { struct tx_curr_get_info {
u32 offset; u32 offset;
u32 fifo_len; u32 fifo_len;
} tx_curr_get_info_t; };
typedef tx_curr_get_info_t tx_curr_put_info_t;
struct tx_curr_put_info {
u32 offset;
u32 fifo_len;
};
typedef struct rxd_info { struct rxd_info {
void *virt_addr; void *virt_addr;
dma_addr_t dma_addr; dma_addr_t dma_addr;
}rxd_info_t; };
/* Structure that holds the Phy and virt addresses of the Blocks */ /* Structure that holds the Phy and virt addresses of the Blocks */
typedef struct rx_block_info { struct rx_block_info {
void *block_virt_addr; void *block_virt_addr;
dma_addr_t block_dma_addr; dma_addr_t block_dma_addr;
rxd_info_t *rxds; struct rxd_info *rxds;
} rx_block_info_t; };
/* pre declaration of the nic structure */
typedef struct s2io_nic nic_t;
/* Ring specific structure */ /* Ring specific structure */
typedef struct ring_info { struct ring_info {
/* The ring number */ /* The ring number */
int ring_no; int ring_no;
...@@ -602,7 +605,7 @@ typedef struct ring_info { ...@@ -602,7 +605,7 @@ typedef struct ring_info {
* Place holders for the virtual and physical addresses of * Place holders for the virtual and physical addresses of
* all the Rx Blocks * all the Rx Blocks
*/ */
rx_block_info_t rx_blocks[MAX_RX_BLOCKS_PER_RING]; struct rx_block_info rx_blocks[MAX_RX_BLOCKS_PER_RING];
int block_count; int block_count;
int pkt_cnt; int pkt_cnt;
...@@ -610,24 +613,24 @@ typedef struct ring_info { ...@@ -610,24 +613,24 @@ typedef struct ring_info {
* Put pointer info which indictes which RxD has to be replenished * Put pointer info which indictes which RxD has to be replenished
* with a new buffer. * with a new buffer.
*/ */
rx_curr_put_info_t rx_curr_put_info; struct rx_curr_put_info rx_curr_put_info;
/* /*
* Get pointer info which indictes which is the last RxD that was * Get pointer info which indictes which is the last RxD that was
* processed by the driver. * processed by the driver.
*/ */
rx_curr_get_info_t rx_curr_get_info; struct rx_curr_get_info rx_curr_get_info;
/* Index to the absolute position of the put pointer of Rx ring */ /* Index to the absolute position of the put pointer of Rx ring */
int put_pos; int put_pos;
/* Buffer Address store. */ /* Buffer Address store. */
buffAdd_t **ba; struct buffAdd **ba;
nic_t *nic; struct s2io_nic *nic;
} ring_info_t; };
/* Fifo specific structure */ /* Fifo specific structure */
typedef struct fifo_info { struct fifo_info {
/* FIFO number */ /* FIFO number */
int fifo_no; int fifo_no;
...@@ -635,40 +638,40 @@ typedef struct fifo_info { ...@@ -635,40 +638,40 @@ typedef struct fifo_info {
int max_txds; int max_txds;
/* Place holder of all the TX List's Phy and Virt addresses. */ /* Place holder of all the TX List's Phy and Virt addresses. */
list_info_hold_t *list_info; struct list_info_hold *list_info;
/* /*
* Current offset within the tx FIFO where driver would write * Current offset within the tx FIFO where driver would write
* new Tx frame * new Tx frame
*/ */
tx_curr_put_info_t tx_curr_put_info; struct tx_curr_put_info tx_curr_put_info;
/* /*
* Current offset within tx FIFO from where the driver would start freeing * Current offset within tx FIFO from where the driver would start freeing
* the buffers * the buffers
*/ */
tx_curr_get_info_t tx_curr_get_info; struct tx_curr_get_info tx_curr_get_info;
nic_t *nic; struct s2io_nic *nic;
}fifo_info_t; };
/* Information related to the Tx and Rx FIFOs and Rings of Xena /* Information related to the Tx and Rx FIFOs and Rings of Xena
* is maintained in this structure. * is maintained in this structure.
*/ */
typedef struct mac_info { struct mac_info {
/* tx side stuff */ /* tx side stuff */
/* logical pointer of start of each Tx FIFO */ /* logical pointer of start of each Tx FIFO */
TxFIFO_element_t __iomem *tx_FIFO_start[MAX_TX_FIFOS]; struct TxFIFO_element __iomem *tx_FIFO_start[MAX_TX_FIFOS];
/* Fifo specific structure */ /* Fifo specific structure */
fifo_info_t fifos[MAX_TX_FIFOS]; struct fifo_info fifos[MAX_TX_FIFOS];
/* Save virtual address of TxD page with zero DMA addr(if any) */ /* Save virtual address of TxD page with zero DMA addr(if any) */
void *zerodma_virt_addr; void *zerodma_virt_addr;
/* rx side stuff */ /* rx side stuff */
/* Ring specific structure */ /* Ring specific structure */
ring_info_t rings[MAX_RX_RINGS]; struct ring_info rings[MAX_RX_RINGS];
u16 rmac_pause_time; u16 rmac_pause_time;
u16 mc_pause_threshold_q0q3; u16 mc_pause_threshold_q0q3;
...@@ -677,14 +680,14 @@ typedef struct mac_info { ...@@ -677,14 +680,14 @@ typedef struct mac_info {
void *stats_mem; /* orignal pointer to allocated mem */ void *stats_mem; /* orignal pointer to allocated mem */
dma_addr_t stats_mem_phy; /* Physical address of the stat block */ dma_addr_t stats_mem_phy; /* Physical address of the stat block */
u32 stats_mem_sz; u32 stats_mem_sz;
StatInfo_t *stats_info; /* Logical address of the stat block */ struct stat_block *stats_info; /* Logical address of the stat block */
} mac_info_t; };
/* structure representing the user defined MAC addresses */ /* structure representing the user defined MAC addresses */
typedef struct { struct usr_addr {
char addr[ETH_ALEN]; char addr[ETH_ALEN];
int usage_cnt; int usage_cnt;
} usr_addr_t; };
/* Default Tunable parameters of the NIC. */ /* Default Tunable parameters of the NIC. */
#define DEFAULT_FIFO_0_LEN 4096 #define DEFAULT_FIFO_0_LEN 4096
...@@ -717,7 +720,7 @@ struct msix_info_st { ...@@ -717,7 +720,7 @@ struct msix_info_st {
}; };
/* Data structure to represent a LRO session */ /* Data structure to represent a LRO session */
typedef struct lro { struct lro {
struct sk_buff *parent; struct sk_buff *parent;
struct sk_buff *last_frag; struct sk_buff *last_frag;
u8 *l2h; u8 *l2h;
...@@ -733,7 +736,7 @@ typedef struct lro { ...@@ -733,7 +736,7 @@ typedef struct lro {
u32 cur_tsval; u32 cur_tsval;
u32 cur_tsecr; u32 cur_tsecr;
u8 saw_ts; u8 saw_ts;
}lro_t; };
/* Structure representing one instance of the NIC */ /* Structure representing one instance of the NIC */
struct s2io_nic { struct s2io_nic {
...@@ -744,7 +747,7 @@ struct s2io_nic { ...@@ -744,7 +747,7 @@ struct s2io_nic {
*/ */
int pkts_to_process; int pkts_to_process;
struct net_device *dev; struct net_device *dev;
mac_info_t mac_control; struct mac_info mac_control;
struct config_param config; struct config_param config;
struct pci_dev *pdev; struct pci_dev *pdev;
void __iomem *bar0; void __iomem *bar0;
...@@ -752,8 +755,8 @@ struct s2io_nic { ...@@ -752,8 +755,8 @@ struct s2io_nic {
#define MAX_MAC_SUPPORTED 16 #define MAX_MAC_SUPPORTED 16
#define MAX_SUPPORTED_MULTICASTS MAX_MAC_SUPPORTED #define MAX_SUPPORTED_MULTICASTS MAX_MAC_SUPPORTED
macaddr_t def_mac_addr[MAX_MAC_SUPPORTED]; struct mac_addr def_mac_addr[MAX_MAC_SUPPORTED];
macaddr_t pre_mac_addr[MAX_MAC_SUPPORTED]; struct mac_addr pre_mac_addr[MAX_MAC_SUPPORTED];
struct net_device_stats stats; struct net_device_stats stats;
int high_dma_flag; int high_dma_flag;
...@@ -781,7 +784,7 @@ struct s2io_nic { ...@@ -781,7 +784,7 @@ struct s2io_nic {
#define MAX_ADDRS_SUPPORTED 64 #define MAX_ADDRS_SUPPORTED 64
u16 usr_addr_count; u16 usr_addr_count;
u16 mc_addr_count; u16 mc_addr_count;
usr_addr_t usr_addrs[MAX_ADDRS_SUPPORTED]; struct usr_addr usr_addrs[MAX_ADDRS_SUPPORTED];
u16 m_cast_flg; u16 m_cast_flg;
u16 all_multi_pos; u16 all_multi_pos;
...@@ -837,7 +840,7 @@ struct s2io_nic { ...@@ -837,7 +840,7 @@ struct s2io_nic {
u8 device_type; u8 device_type;
#define MAX_LRO_SESSIONS 32 #define MAX_LRO_SESSIONS 32
lro_t lro0_n[MAX_LRO_SESSIONS]; struct lro lro0_n[MAX_LRO_SESSIONS];
unsigned long clubbed_frms_cnt; unsigned long clubbed_frms_cnt;
unsigned long sending_both; unsigned long sending_both;
u8 lro; u8 lro;
...@@ -972,8 +975,8 @@ static void __devexit s2io_rem_nic(struct pci_dev *pdev); ...@@ -972,8 +975,8 @@ static void __devexit s2io_rem_nic(struct pci_dev *pdev);
static int init_shared_mem(struct s2io_nic *sp); static int init_shared_mem(struct s2io_nic *sp);
static void free_shared_mem(struct s2io_nic *sp); static void free_shared_mem(struct s2io_nic *sp);
static int init_nic(struct s2io_nic *nic); static int init_nic(struct s2io_nic *nic);
static void rx_intr_handler(ring_info_t *ring_data); static void rx_intr_handler(struct ring_info *ring_data);
static void tx_intr_handler(fifo_info_t *fifo_data); static void tx_intr_handler(struct fifo_info *fifo_data);
static void alarm_intr_handler(struct s2io_nic *sp); static void alarm_intr_handler(struct s2io_nic *sp);
static int s2io_starter(void); static int s2io_starter(void);
...@@ -981,38 +984,41 @@ static void s2io_closer(void); ...@@ -981,38 +984,41 @@ static void s2io_closer(void);
static void s2io_tx_watchdog(struct net_device *dev); static void s2io_tx_watchdog(struct net_device *dev);
static void s2io_tasklet(unsigned long dev_addr); static void s2io_tasklet(unsigned long dev_addr);
static void s2io_set_multicast(struct net_device *dev); static void s2io_set_multicast(struct net_device *dev);
static int rx_osm_handler(ring_info_t *ring_data, RxD_t * rxdp); static int rx_osm_handler(struct ring_info *ring_data, struct RxD_t * rxdp);
static void s2io_link(nic_t * sp, int link); static void s2io_link(struct s2io_nic * sp, int link);
static void s2io_reset(nic_t * sp); static void s2io_reset(struct s2io_nic * sp);
static int s2io_poll(struct net_device *dev, int *budget); static int s2io_poll(struct net_device *dev, int *budget);
static void s2io_init_pci(nic_t * sp); static void s2io_init_pci(struct s2io_nic * sp);
static int s2io_set_mac_addr(struct net_device *dev, u8 * addr); static int s2io_set_mac_addr(struct net_device *dev, u8 * addr);
static void s2io_alarm_handle(unsigned long data); static void s2io_alarm_handle(unsigned long data);
static int s2io_enable_msi(nic_t *nic); static int s2io_enable_msi(struct s2io_nic *nic);
static irqreturn_t s2io_msi_handle(int irq, void *dev_id); static irqreturn_t s2io_msi_handle(int irq, void *dev_id);
static irqreturn_t static irqreturn_t
s2io_msix_ring_handle(int irq, void *dev_id); s2io_msix_ring_handle(int irq, void *dev_id);
static irqreturn_t static irqreturn_t
s2io_msix_fifo_handle(int irq, void *dev_id); s2io_msix_fifo_handle(int irq, void *dev_id);
static irqreturn_t s2io_isr(int irq, void *dev_id); static irqreturn_t s2io_isr(int irq, void *dev_id);
static int verify_xena_quiescence(nic_t *sp); static int verify_xena_quiescence(struct s2io_nic *sp);
static const struct ethtool_ops netdev_ethtool_ops; static const struct ethtool_ops netdev_ethtool_ops;
static void s2io_set_link(struct work_struct *work); static void s2io_set_link(struct work_struct *work);
static int s2io_set_swapper(nic_t * sp); static int s2io_set_swapper(struct s2io_nic * sp);
static void s2io_card_down(nic_t *nic); static void s2io_card_down(struct s2io_nic *nic);
static int s2io_card_up(nic_t *nic); static int s2io_card_up(struct s2io_nic *nic);
static int get_xena_rev_id(struct pci_dev *pdev); static int get_xena_rev_id(struct pci_dev *pdev);
static int wait_for_cmd_complete(void *addr, u64 busy_bit); static int wait_for_cmd_complete(void *addr, u64 busy_bit);
static int s2io_add_isr(nic_t * sp); static int s2io_add_isr(struct s2io_nic * sp);
static void s2io_rem_isr(nic_t * sp); static void s2io_rem_isr(struct s2io_nic * sp);
static void restore_xmsi_data(nic_t *nic); static void restore_xmsi_data(struct s2io_nic *nic);
static int s2io_club_tcp_session(u8 *buffer, u8 **tcp, u32 *tcp_len, lro_t **lro, RxD_t *rxdp, nic_t *sp); static int
static void clear_lro_session(lro_t *lro); s2io_club_tcp_session(u8 *buffer, u8 **tcp, u32 *tcp_len, struct lro **lro,
struct RxD_t *rxdp, struct s2io_nic *sp);
static void clear_lro_session(struct lro *lro);
static void queue_rx_frame(struct sk_buff *skb); static void queue_rx_frame(struct sk_buff *skb);
static void update_L3L4_header(nic_t *sp, lro_t *lro); static void update_L3L4_header(struct s2io_nic *sp, struct lro *lro);
static void lro_append_pkt(nic_t *sp, lro_t *lro, struct sk_buff *skb, u32 tcp_len); static void lro_append_pkt(struct s2io_nic *sp, struct lro *lro,
struct sk_buff *skb, u32 tcp_len);
#define s2io_tcp_mss(skb) skb_shinfo(skb)->gso_size #define s2io_tcp_mss(skb) skb_shinfo(skb)->gso_size
#define s2io_udp_mss(skb) skb_shinfo(skb)->gso_size #define s2io_udp_mss(skb) skb_shinfo(skb)->gso_size
......
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