提交 1c1e45d1 编写于 作者: H Hans Verkuil 提交者: Mauro Carvalho Chehab

V4L/DVB (7786): cx18: new driver for the Conexant CX23418 MPEG encoder chip

Many thanks to Steve Toth from Hauppauge and Nattu Dakshinamurthy from
Conexant for their support. I am in particular thankful to Hauppauge
since without their help this driver would not exist. It should also
be noted that Steve did the work to get the DVB part up and running.
Thank you!
Signed-off-by: NHans Verkuil <hverkuil@xs4all.nl>
Signed-off-by: NSteven Toth <stoth@hauppauge.com>
Signed-off-by: NMichael Krufky <mkrufky@linuxtv.org>
Signed-off-by: NG. Andrew Walls <awalls@radix.net>
Signed-off-by: NMauro Carvalho Chehab <mchehab@infradead.org>
上级 d74bee8b
Some notes regarding the cx18 driver for the Conexant CX23418 MPEG
encoder chip:
1) The only hardware currently supported is the Hauppauge HVR-1600.
2) Some people have problems getting the i2c bus to work. Cause unknown.
The symptom is that the eeprom cannot be read and the card is
unusable.
3) The audio from the analog tuner is mono only. Probably caused by
incorrect audio register information in the datasheet. We are
waiting for updated information from Conexant.
4) VBI (raw or sliced) has not yet been implemented.
5) MPEG indexing is not yet implemented.
6) The driver is still a bit rough around the edges, this should
improve over time.
Firmware:
The firmware needs to be extracted from the Windows Hauppauge HVR-1600
driver, available here:
http://hauppauge.lightpath.net/software/install_cd/hauppauge_cd_3.4d1.zip
Unzip, then copy the following files to the firmware directory
and rename them as follows:
Drivers/Driver18/hcw18apu.rom -> v4l-cx23418-apu.fw
Drivers/Driver18/hcw18enc.rom -> v4l-cx23418-cpu.fw
Drivers/Driver18/hcw18mlC.rom -> v4l-cx23418-dig.fw
......@@ -748,6 +748,8 @@ source "drivers/media/video/au0828/Kconfig"
source "drivers/media/video/ivtv/Kconfig"
source "drivers/media/video/cx18/Kconfig"
config VIDEO_M32R_AR
tristate "AR devices"
depends on M32R && VIDEO_V4L1
......
......@@ -124,6 +124,7 @@ obj-$(CONFIG_USB_VICAM) += usbvideo/
obj-$(CONFIG_USB_QUICKCAM_MESSENGER) += usbvideo/
obj-$(CONFIG_VIDEO_IVTV) += ivtv/
obj-$(CONFIG_VIDEO_CX18) += cx18/
obj-$(CONFIG_VIDEO_VIVI) += vivi.o
obj-$(CONFIG_VIDEO_CX23885) += cx23885/
......
config VIDEO_CX18
tristate "Conexant cx23418 MPEG encoder support"
depends on VIDEO_V4L2 && DVB_CORE && PCI && I2C && EXPERIMENTAL
select I2C_ALGOBIT
select FW_LOADER
select VIDEO_IR
select VIDEO_TUNER
select VIDEO_TVEEPROM
select VIDEO_CX2341X
select VIDEO_CS5345
select DVB_S5H1409
---help---
This is a video4linux driver for Conexant cx23418 based
PCI combo video recorder devices.
This is used in devices such as the Hauppauge HVR-1600
cards.
To compile this driver as a module, choose M here: the
module will be called cx18.
cx18-objs := cx18-driver.o cx18-cards.o cx18-i2c.o cx18-firmware.o cx18-gpio.o \
cx18-queue.o cx18-streams.o cx18-fileops.o cx18-ioctl.o cx18-controls.o \
cx18-mailbox.o cx18-vbi.o cx18-audio.o cx18-video.o cx18-irq.o \
cx18-av-core.o cx18-av-audio.o cx18-av-firmware.o cx18-av-vbi.o cx18-scb.o \
cx18-dvb.o
obj-$(CONFIG_VIDEO_CX18) += cx18.o
EXTRA_CFLAGS += -Idrivers/media/dvb/dvb-core
EXTRA_CFLAGS += -Idrivers/media/dvb/frontends
EXTRA_CFLAGS += -Idrivers/media/common/tuners
/*
* cx18 audio-related functions
*
* Derived from ivtv-audio.c
*
* Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
* 02111-1307 USA
*/
#include "cx18-driver.h"
#include "cx18-i2c.h"
#include "cx18-cards.h"
#include "cx18-audio.h"
/* Selects the audio input and output according to the current
settings. */
int cx18_audio_set_io(struct cx18 *cx)
{
struct v4l2_routing route;
u32 audio_input;
int mux_input;
/* Determine which input to use */
if (test_bit(CX18_F_I_RADIO_USER, &cx->i_flags)) {
audio_input = cx->card->radio_input.audio_input;
mux_input = cx->card->radio_input.muxer_input;
} else {
audio_input =
cx->card->audio_inputs[cx->audio_input].audio_input;
mux_input =
cx->card->audio_inputs[cx->audio_input].muxer_input;
}
/* handle muxer chips */
route.input = mux_input;
route.output = 0;
cx18_i2c_hw(cx, cx->card->hw_muxer, VIDIOC_INT_S_AUDIO_ROUTING, &route);
route.input = audio_input;
return cx18_i2c_hw(cx, cx->card->hw_audio_ctrl,
VIDIOC_INT_S_AUDIO_ROUTING, &route);
}
void cx18_audio_set_route(struct cx18 *cx, struct v4l2_routing *route)
{
cx18_i2c_hw(cx, cx->card->hw_audio_ctrl,
VIDIOC_INT_S_AUDIO_ROUTING, route);
}
void cx18_audio_set_audio_clock_freq(struct cx18 *cx, u8 freq)
{
static u32 freqs[3] = { 44100, 48000, 32000 };
/* The audio clock of the digitizer must match the codec sample
rate otherwise you get some very strange effects. */
if (freq > 2)
return;
cx18_call_i2c_clients(cx, VIDIOC_INT_AUDIO_CLOCK_FREQ, &freqs[freq]);
}
/*
* cx18 audio-related functions
*
* Derived from ivtv-audio.c
*
* Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
* 02111-1307 USA
*/
int cx18_audio_set_io(struct cx18 *cx);
void cx18_audio_set_route(struct cx18 *cx, struct v4l2_routing *route);
void cx18_audio_set_audio_clock_freq(struct cx18 *cx, u8 freq);
/*
* cx18 ADEC audio functions
*
* Derived from cx25840-audio.c
*
* Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
* 02110-1301, USA.
*/
#include "cx18-driver.h"
static int set_audclk_freq(struct cx18 *cx, u32 freq)
{
struct cx18_av_state *state = &cx->av_state;
if (freq != 32000 && freq != 44100 && freq != 48000)
return -EINVAL;
/* common for all inputs and rates */
/* SA_MCLK_SEL=1, SA_MCLK_DIV=0x10 */
cx18_av_write(cx, 0x127, 0x50);
if (state->aud_input != CX18_AV_AUDIO_SERIAL) {
switch (freq) {
case 32000:
/* VID_PLL and AUX_PLL */
cx18_av_write4(cx, 0x108, 0x1006040f);
/* AUX_PLL_FRAC */
cx18_av_write4(cx, 0x110, 0x01bb39ee);
/* src3/4/6_ctl = 0x0801f77f */
cx18_av_write4(cx, 0x900, 0x0801f77f);
cx18_av_write4(cx, 0x904, 0x0801f77f);
cx18_av_write4(cx, 0x90c, 0x0801f77f);
break;
case 44100:
/* VID_PLL and AUX_PLL */
cx18_av_write4(cx, 0x108, 0x1009040f);
/* AUX_PLL_FRAC */
cx18_av_write4(cx, 0x110, 0x00ec6bd6);
/* src3/4/6_ctl = 0x08016d59 */
cx18_av_write4(cx, 0x900, 0x08016d59);
cx18_av_write4(cx, 0x904, 0x08016d59);
cx18_av_write4(cx, 0x90c, 0x08016d59);
break;
case 48000:
/* VID_PLL and AUX_PLL */
cx18_av_write4(cx, 0x108, 0x100a040f);
/* AUX_PLL_FRAC */
cx18_av_write4(cx, 0x110, 0x0098d6e5);
/* src3/4/6_ctl = 0x08014faa */
cx18_av_write4(cx, 0x900, 0x08014faa);
cx18_av_write4(cx, 0x904, 0x08014faa);
cx18_av_write4(cx, 0x90c, 0x08014faa);
break;
}
} else {
switch (freq) {
case 32000:
/* VID_PLL and AUX_PLL */
cx18_av_write4(cx, 0x108, 0x1e08040f);
/* AUX_PLL_FRAC */
cx18_av_write4(cx, 0x110, 0x012a0869);
/* src1_ctl = 0x08010000 */
cx18_av_write4(cx, 0x8f8, 0x08010000);
/* src3/4/6_ctl = 0x08020000 */
cx18_av_write4(cx, 0x900, 0x08020000);
cx18_av_write4(cx, 0x904, 0x08020000);
cx18_av_write4(cx, 0x90c, 0x08020000);
/* SA_MCLK_SEL=1, SA_MCLK_DIV=0x14 */
cx18_av_write(cx, 0x127, 0x54);
break;
case 44100:
/* VID_PLL and AUX_PLL */
cx18_av_write4(cx, 0x108, 0x1809040f);
/* AUX_PLL_FRAC */
cx18_av_write4(cx, 0x110, 0x00ec6bd6);
/* src1_ctl = 0x08010000 */
cx18_av_write4(cx, 0x8f8, 0x080160cd);
/* src3/4/6_ctl = 0x08020000 */
cx18_av_write4(cx, 0x900, 0x08017385);
cx18_av_write4(cx, 0x904, 0x08017385);
cx18_av_write4(cx, 0x90c, 0x08017385);
break;
case 48000:
/* VID_PLL and AUX_PLL */
cx18_av_write4(cx, 0x108, 0x180a040f);
/* AUX_PLL_FRAC */
cx18_av_write4(cx, 0x110, 0x0098d6e5);
/* src1_ctl = 0x08010000 */
cx18_av_write4(cx, 0x8f8, 0x08018000);
/* src3/4/6_ctl = 0x08020000 */
cx18_av_write4(cx, 0x900, 0x08015555);
cx18_av_write4(cx, 0x904, 0x08015555);
cx18_av_write4(cx, 0x90c, 0x08015555);
break;
}
}
state->audclk_freq = freq;
return 0;
}
void cx18_av_audio_set_path(struct cx18 *cx)
{
struct cx18_av_state *state = &cx->av_state;
/* stop microcontroller */
cx18_av_and_or(cx, 0x803, ~0x10, 0);
/* assert soft reset */
cx18_av_and_or(cx, 0x810, ~0x1, 0x01);
/* Mute everything to prevent the PFFT! */
cx18_av_write(cx, 0x8d3, 0x1f);
if (state->aud_input == CX18_AV_AUDIO_SERIAL) {
/* Set Path1 to Serial Audio Input */
cx18_av_write4(cx, 0x8d0, 0x01011012);
/* The microcontroller should not be started for the
* non-tuner inputs: autodetection is specific for
* TV audio. */
} else {
/* Set Path1 to Analog Demod Main Channel */
cx18_av_write4(cx, 0x8d0, 0x1f063870);
}
set_audclk_freq(cx, state->audclk_freq);
/* deassert soft reset */
cx18_av_and_or(cx, 0x810, ~0x1, 0x00);
if (state->aud_input != CX18_AV_AUDIO_SERIAL) {
/* When the microcontroller detects the
* audio format, it will unmute the lines */
cx18_av_and_or(cx, 0x803, ~0x10, 0x10);
}
}
static int get_volume(struct cx18 *cx)
{
/* Volume runs +18dB to -96dB in 1/2dB steps
* change to fit the msp3400 -114dB to +12dB range */
/* check PATH1_VOLUME */
int vol = 228 - cx18_av_read(cx, 0x8d4);
vol = (vol / 2) + 23;
return vol << 9;
}
static void set_volume(struct cx18 *cx, int volume)
{
/* First convert the volume to msp3400 values (0-127) */
int vol = volume >> 9;
/* now scale it up to cx18_av values
* -114dB to -96dB maps to 0
* this should be 19, but in my testing that was 4dB too loud */
if (vol <= 23)
vol = 0;
else
vol -= 23;
/* PATH1_VOLUME */
cx18_av_write(cx, 0x8d4, 228 - (vol * 2));
}
static int get_bass(struct cx18 *cx)
{
/* bass is 49 steps +12dB to -12dB */
/* check PATH1_EQ_BASS_VOL */
int bass = cx18_av_read(cx, 0x8d9) & 0x3f;
bass = (((48 - bass) * 0xffff) + 47) / 48;
return bass;
}
static void set_bass(struct cx18 *cx, int bass)
{
/* PATH1_EQ_BASS_VOL */
cx18_av_and_or(cx, 0x8d9, ~0x3f, 48 - (bass * 48 / 0xffff));
}
static int get_treble(struct cx18 *cx)
{
/* treble is 49 steps +12dB to -12dB */
/* check PATH1_EQ_TREBLE_VOL */
int treble = cx18_av_read(cx, 0x8db) & 0x3f;
treble = (((48 - treble) * 0xffff) + 47) / 48;
return treble;
}
static void set_treble(struct cx18 *cx, int treble)
{
/* PATH1_EQ_TREBLE_VOL */
cx18_av_and_or(cx, 0x8db, ~0x3f, 48 - (treble * 48 / 0xffff));
}
static int get_balance(struct cx18 *cx)
{
/* balance is 7 bit, 0 to -96dB */
/* check PATH1_BAL_LEVEL */
int balance = cx18_av_read(cx, 0x8d5) & 0x7f;
/* check PATH1_BAL_LEFT */
if ((cx18_av_read(cx, 0x8d5) & 0x80) == 0)
balance = 0x80 - balance;
else
balance = 0x80 + balance;
return balance << 8;
}
static void set_balance(struct cx18 *cx, int balance)
{
int bal = balance >> 8;
if (bal > 0x80) {
/* PATH1_BAL_LEFT */
cx18_av_and_or(cx, 0x8d5, 0x7f, 0x80);
/* PATH1_BAL_LEVEL */
cx18_av_and_or(cx, 0x8d5, ~0x7f, bal & 0x7f);
} else {
/* PATH1_BAL_LEFT */
cx18_av_and_or(cx, 0x8d5, 0x7f, 0x00);
/* PATH1_BAL_LEVEL */
cx18_av_and_or(cx, 0x8d5, ~0x7f, 0x80 - bal);
}
}
static int get_mute(struct cx18 *cx)
{
/* check SRC1_MUTE_EN */
return cx18_av_read(cx, 0x8d3) & 0x2 ? 1 : 0;
}
static void set_mute(struct cx18 *cx, int mute)
{
struct cx18_av_state *state = &cx->av_state;
if (state->aud_input != CX18_AV_AUDIO_SERIAL) {
/* Must turn off microcontroller in order to mute sound.
* Not sure if this is the best method, but it does work.
* If the microcontroller is running, then it will undo any
* changes to the mute register. */
if (mute) {
/* disable microcontroller */
cx18_av_and_or(cx, 0x803, ~0x10, 0x00);
cx18_av_write(cx, 0x8d3, 0x1f);
} else {
/* enable microcontroller */
cx18_av_and_or(cx, 0x803, ~0x10, 0x10);
}
} else {
/* SRC1_MUTE_EN */
cx18_av_and_or(cx, 0x8d3, ~0x2, mute ? 0x02 : 0x00);
}
}
int cx18_av_audio(struct cx18 *cx, unsigned int cmd, void *arg)
{
struct cx18_av_state *state = &cx->av_state;
struct v4l2_control *ctrl = arg;
int retval;
switch (cmd) {
case VIDIOC_INT_AUDIO_CLOCK_FREQ:
if (state->aud_input != CX18_AV_AUDIO_SERIAL) {
cx18_av_and_or(cx, 0x803, ~0x10, 0);
cx18_av_write(cx, 0x8d3, 0x1f);
}
cx18_av_and_or(cx, 0x810, ~0x1, 1);
retval = set_audclk_freq(cx, *(u32 *)arg);
cx18_av_and_or(cx, 0x810, ~0x1, 0);
if (state->aud_input != CX18_AV_AUDIO_SERIAL)
cx18_av_and_or(cx, 0x803, ~0x10, 0x10);
return retval;
case VIDIOC_G_CTRL:
switch (ctrl->id) {
case V4L2_CID_AUDIO_VOLUME:
ctrl->value = get_volume(cx);
break;
case V4L2_CID_AUDIO_BASS:
ctrl->value = get_bass(cx);
break;
case V4L2_CID_AUDIO_TREBLE:
ctrl->value = get_treble(cx);
break;
case V4L2_CID_AUDIO_BALANCE:
ctrl->value = get_balance(cx);
break;
case V4L2_CID_AUDIO_MUTE:
ctrl->value = get_mute(cx);
break;
default:
return -EINVAL;
}
break;
case VIDIOC_S_CTRL:
switch (ctrl->id) {
case V4L2_CID_AUDIO_VOLUME:
set_volume(cx, ctrl->value);
break;
case V4L2_CID_AUDIO_BASS:
set_bass(cx, ctrl->value);
break;
case V4L2_CID_AUDIO_TREBLE:
set_treble(cx, ctrl->value);
break;
case V4L2_CID_AUDIO_BALANCE:
set_balance(cx, ctrl->value);
break;
case V4L2_CID_AUDIO_MUTE:
set_mute(cx, ctrl->value);
break;
default:
return -EINVAL;
}
break;
default:
return -EINVAL;
}
return 0;
}
此差异已折叠。
/*
* cx18 ADEC header
*
* Derived from cx25840-core.h
*
* Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
* 02110-1301, USA.
*/
#ifndef _CX18_AV_CORE_H_
#define _CX18_AV_CORE_H_
struct cx18;
enum cx18_av_video_input {
/* Composite video inputs In1-In8 */
CX18_AV_COMPOSITE1 = 1,
CX18_AV_COMPOSITE2,
CX18_AV_COMPOSITE3,
CX18_AV_COMPOSITE4,
CX18_AV_COMPOSITE5,
CX18_AV_COMPOSITE6,
CX18_AV_COMPOSITE7,
CX18_AV_COMPOSITE8,
/* S-Video inputs consist of one luma input (In1-In4) ORed with one
chroma input (In5-In8) */
CX18_AV_SVIDEO_LUMA1 = 0x10,
CX18_AV_SVIDEO_LUMA2 = 0x20,
CX18_AV_SVIDEO_LUMA3 = 0x30,
CX18_AV_SVIDEO_LUMA4 = 0x40,
CX18_AV_SVIDEO_CHROMA4 = 0x400,
CX18_AV_SVIDEO_CHROMA5 = 0x500,
CX18_AV_SVIDEO_CHROMA6 = 0x600,
CX18_AV_SVIDEO_CHROMA7 = 0x700,
CX18_AV_SVIDEO_CHROMA8 = 0x800,
/* S-Video aliases for common luma/chroma combinations */
CX18_AV_SVIDEO1 = 0x510,
CX18_AV_SVIDEO2 = 0x620,
CX18_AV_SVIDEO3 = 0x730,
CX18_AV_SVIDEO4 = 0x840,
};
enum cx18_av_audio_input {
/* Audio inputs: serial or In4-In8 */
CX18_AV_AUDIO_SERIAL,
CX18_AV_AUDIO4 = 4,
CX18_AV_AUDIO5,
CX18_AV_AUDIO6,
CX18_AV_AUDIO7,
CX18_AV_AUDIO8,
};
struct cx18_av_state {
int radio;
v4l2_std_id std;
enum cx18_av_video_input vid_input;
enum cx18_av_audio_input aud_input;
u32 audclk_freq;
int audmode;
int vbi_line_offset;
u32 id;
u32 rev;
int is_initialized;
};
/* Registers */
#define CXADEC_CHIP_TYPE_TIGER 0x837
#define CXADEC_CHIP_TYPE_MAKO 0x843
#define CXADEC_HOST_REG1 0x000
#define CXADEC_HOST_REG2 0x001
#define CXADEC_CHIP_CTRL 0x100
#define CXADEC_AFE_CTRL 0x104
#define CXADEC_PLL_CTRL1 0x108
#define CXADEC_VID_PLL_FRAC 0x10C
#define CXADEC_AUX_PLL_FRAC 0x110
#define CXADEC_PIN_CTRL1 0x114
#define CXADEC_PIN_CTRL2 0x118
#define CXADEC_PIN_CFG1 0x11C
#define CXADEC_PIN_CFG2 0x120
#define CXADEC_PIN_CFG3 0x124
#define CXADEC_I2S_MCLK 0x127
#define CXADEC_AUD_LOCK1 0x128
#define CXADEC_AUD_LOCK2 0x12C
#define CXADEC_POWER_CTRL 0x130
#define CXADEC_AFE_DIAG_CTRL1 0x134
#define CXADEC_AFE_DIAG_CTRL2 0x138
#define CXADEC_AFE_DIAG_CTRL3 0x13C
#define CXADEC_PLL_DIAG_CTRL 0x140
#define CXADEC_TEST_CTRL1 0x144
#define CXADEC_TEST_CTRL2 0x148
#define CXADEC_BIST_STAT 0x14C
#define CXADEC_DLL1_DIAG_CTRL 0x158
#define CXADEC_DLL2_DIAG_CTRL 0x15C
/* IR registers */
#define CXADEC_IR_CTRL_REG 0x200
#define CXADEC_IR_TXCLK_REG 0x204
#define CXADEC_IR_RXCLK_REG 0x208
#define CXADEC_IR_CDUTY_REG 0x20C
#define CXADEC_IR_STAT_REG 0x210
#define CXADEC_IR_IRQEN_REG 0x214
#define CXADEC_IR_FILTER_REG 0x218
#define CXADEC_IR_FIFO_REG 0x21C
/* Video Registers */
#define CXADEC_MODE_CTRL 0x400
#define CXADEC_OUT_CTRL1 0x404
#define CXADEC_OUT_CTRL2 0x408
#define CXADEC_GEN_STAT 0x40C
#define CXADEC_INT_STAT_MASK 0x410
#define CXADEC_LUMA_CTRL 0x414
#define CXADEC_BRIGHTNESS_CTRL_BYTE 0x414
#define CXADEC_CONTRAST_CTRL_BYTE 0x415
#define CXADEC_LUMA_CTRL_BYTE_3 0x416
#define CXADEC_HSCALE_CTRL 0x418
#define CXADEC_VSCALE_CTRL 0x41C
#define CXADEC_CHROMA_CTRL 0x420
#define CXADEC_USAT_CTRL_BYTE 0x420
#define CXADEC_VSAT_CTRL_BYTE 0x421
#define CXADEC_HUE_CTRL_BYTE 0x422
#define CXADEC_VBI_LINE_CTRL1 0x424
#define CXADEC_VBI_LINE_CTRL2 0x428
#define CXADEC_VBI_LINE_CTRL3 0x42C
#define CXADEC_VBI_LINE_CTRL4 0x430
#define CXADEC_VBI_LINE_CTRL5 0x434
#define CXADEC_VBI_FC_CFG 0x438
#define CXADEC_VBI_MISC_CFG1 0x43C
#define CXADEC_VBI_MISC_CFG2 0x440
#define CXADEC_VBI_PAY1 0x444
#define CXADEC_VBI_PAY2 0x448
#define CXADEC_VBI_CUST1_CFG1 0x44C
#define CXADEC_VBI_CUST1_CFG2 0x450
#define CXADEC_VBI_CUST1_CFG3 0x454
#define CXADEC_VBI_CUST2_CFG1 0x458
#define CXADEC_VBI_CUST2_CFG2 0x45C
#define CXADEC_VBI_CUST2_CFG3 0x460
#define CXADEC_VBI_CUST3_CFG1 0x464
#define CXADEC_VBI_CUST3_CFG2 0x468
#define CXADEC_VBI_CUST3_CFG3 0x46C
#define CXADEC_HORIZ_TIM_CTRL 0x470
#define CXADEC_VERT_TIM_CTRL 0x474
#define CXADEC_SRC_COMB_CFG 0x478
#define CXADEC_CHROMA_VBIOFF_CFG 0x47C
#define CXADEC_FIELD_COUNT 0x480
#define CXADEC_MISC_TIM_CTRL 0x484
#define CXADEC_DFE_CTRL1 0x488
#define CXADEC_DFE_CTRL2 0x48C
#define CXADEC_DFE_CTRL3 0x490
#define CXADEC_PLL_CTRL2 0x494
#define CXADEC_HTL_CTRL 0x498
#define CXADEC_COMB_CTRL 0x49C
#define CXADEC_CRUSH_CTRL 0x4A0
#define CXADEC_SOFT_RST_CTRL 0x4A4
#define CXADEC_MV_DT_CTRL2 0x4A8
#define CXADEC_MV_DT_CTRL3 0x4AC
#define CXADEC_MISC_DIAG_CTRL 0x4B8
#define CXADEC_DL_CTL 0x800
#define CXADEC_DL_CTL_ADDRESS_LOW 0x800 /* Byte 1 in DL_CTL */
#define CXADEC_DL_CTL_ADDRESS_HIGH 0x801 /* Byte 2 in DL_CTL */
#define CXADEC_DL_CTL_DATA 0x802 /* Byte 3 in DL_CTL */
#define CXADEC_DL_CTL_CONTROL 0x803 /* Byte 4 in DL_CTL */
#define CXADEC_STD_DET_STATUS 0x804
#define CXADEC_STD_DET_CTL 0x808
#define CXADEC_STD_DET_CTL_AUD_CTL 0x808 /* Byte 1 in STD_DET_CTL */
#define CXADEC_STD_DET_CTL_PREF_MODE 0x809 /* Byte 2 in STD_DET_CTL */
#define CXADEC_DW8051_INT 0x80C
#define CXADEC_GENERAL_CTL 0x810
#define CXADEC_AAGC_CTL 0x814
#define CXADEC_IF_SRC_CTL 0x818
#define CXADEC_ANLOG_DEMOD_CTL 0x81C
#define CXADEC_ROT_FREQ_CTL 0x820
#define CXADEC_FM1_CTL 0x824
#define CXADEC_PDF_CTL 0x828
#define CXADEC_DFT1_CTL1 0x82C
#define CXADEC_DFT1_CTL2 0x830
#define CXADEC_DFT_STATUS 0x834
#define CXADEC_DFT2_CTL1 0x838
#define CXADEC_DFT2_CTL2 0x83C
#define CXADEC_DFT2_STATUS 0x840
#define CXADEC_DFT3_CTL1 0x844
#define CXADEC_DFT3_CTL2 0x848
#define CXADEC_DFT3_STATUS 0x84C
#define CXADEC_DFT4_CTL1 0x850
#define CXADEC_DFT4_CTL2 0x854
#define CXADEC_DFT4_STATUS 0x858
#define CXADEC_AM_MTS_DET 0x85C
#define CXADEC_ANALOG_MUX_CTL 0x860
#define CXADEC_DIG_PLL_CTL1 0x864
#define CXADEC_DIG_PLL_CTL2 0x868
#define CXADEC_DIG_PLL_CTL3 0x86C
#define CXADEC_DIG_PLL_CTL4 0x870
#define CXADEC_DIG_PLL_CTL5 0x874
#define CXADEC_DEEMPH_GAIN_CTL 0x878
#define CXADEC_DEEMPH_COEF1 0x87C
#define CXADEC_DEEMPH_COEF2 0x880
#define CXADEC_DBX1_CTL1 0x884
#define CXADEC_DBX1_CTL2 0x888
#define CXADEC_DBX1_STATUS 0x88C
#define CXADEC_DBX2_CTL1 0x890
#define CXADEC_DBX2_CTL2 0x894
#define CXADEC_DBX2_STATUS 0x898
#define CXADEC_AM_FM_DIFF 0x89C
/* NICAM registers go here */
#define CXADEC_NICAM_STATUS 0x8C8
#define CXADEC_DEMATRIX_CTL 0x8CC
#define CXADEC_PATH1_CTL1 0x8D0
#define CXADEC_PATH1_VOL_CTL 0x8D4
#define CXADEC_PATH1_EQ_CTL 0x8D8
#define CXADEC_PATH1_SC_CTL 0x8DC
#define CXADEC_PATH2_CTL1 0x8E0
#define CXADEC_PATH2_VOL_CTL 0x8E4
#define CXADEC_PATH2_EQ_CTL 0x8E8
#define CXADEC_PATH2_SC_CTL 0x8EC
#define CXADEC_SRC_CTL 0x8F0
#define CXADEC_SRC_LF_COEF 0x8F4
#define CXADEC_SRC1_CTL 0x8F8
#define CXADEC_SRC2_CTL 0x8FC
#define CXADEC_SRC3_CTL 0x900
#define CXADEC_SRC4_CTL 0x904
#define CXADEC_SRC5_CTL 0x908
#define CXADEC_SRC6_CTL 0x90C
#define CXADEC_BASEBAND_OUT_SEL 0x910
#define CXADEC_I2S_IN_CTL 0x914
#define CXADEC_I2S_OUT_CTL 0x918
#define CXADEC_AC97_CTL 0x91C
#define CXADEC_QAM_PDF 0x920
#define CXADEC_QAM_CONST_DEC 0x924
#define CXADEC_QAM_ROTATOR_FREQ 0x948
/* Bit defintions / settings used in Mako Audio */
#define CXADEC_PREF_MODE_MONO_LANGA 0
#define CXADEC_PREF_MODE_MONO_LANGB 1
#define CXADEC_PREF_MODE_MONO_LANGC 2
#define CXADEC_PREF_MODE_FALLBACK 3
#define CXADEC_PREF_MODE_STEREO 4
#define CXADEC_PREF_MODE_DUAL_LANG_AC 5
#define CXADEC_PREF_MODE_DUAL_LANG_BC 6
#define CXADEC_PREF_MODE_DUAL_LANG_AB 7
#define CXADEC_DETECT_STEREO 1
#define CXADEC_DETECT_DUAL 2
#define CXADEC_DETECT_TRI 4
#define CXADEC_DETECT_SAP 0x10
#define CXADEC_DETECT_NO_SIGNAL 0xFF
#define CXADEC_SELECT_AUDIO_STANDARD_BG 0xF0 /* NICAM BG and A2 BG */
#define CXADEC_SELECT_AUDIO_STANDARD_DK1 0xF1 /* NICAM DK and A2 DK */
#define CXADEC_SELECT_AUDIO_STANDARD_DK2 0xF2
#define CXADEC_SELECT_AUDIO_STANDARD_DK3 0xF3
#define CXADEC_SELECT_AUDIO_STANDARD_I 0xF4 /* NICAM I and A1 */
#define CXADEC_SELECT_AUDIO_STANDARD_L 0xF5 /* NICAM L and System L AM */
#define CXADEC_SELECT_AUDIO_STANDARD_BTSC 0xF6
#define CXADEC_SELECT_AUDIO_STANDARD_EIAJ 0xF7
#define CXADEC_SELECT_AUDIO_STANDARD_A2_M 0xF8 /* A2 M */
#define CXADEC_SELECT_AUDIO_STANDARD_FM 0xF9 /* FM radio */
#define CXADEC_SELECT_AUDIO_STANDARD_AUTO 0xFF /* Auto detect */
/* ----------------------------------------------------------------------- */
/* cx18_av-core.c */
int cx18_av_write(struct cx18 *cx, u16 addr, u8 value);
int cx18_av_write4(struct cx18 *cx, u16 addr, u32 value);
u8 cx18_av_read(struct cx18 *cx, u16 addr);
u32 cx18_av_read4(struct cx18 *cx, u16 addr);
int cx18_av_and_or(struct cx18 *cx, u16 addr, unsigned mask, u8 value);
int cx18_av_and_or4(struct cx18 *cx, u16 addr, u32 mask, u32 value);
int cx18_av_cmd(struct cx18 *cx, unsigned int cmd, void *arg);
/* ----------------------------------------------------------------------- */
/* cx18_av-firmware.c */
int cx18_av_loadfw(struct cx18 *cx);
/* ----------------------------------------------------------------------- */
/* cx18_av-audio.c */
int cx18_av_audio(struct cx18 *cx, unsigned int cmd, void *arg);
void cx18_av_audio_set_path(struct cx18 *cx);
/* ----------------------------------------------------------------------- */
/* cx18_av-vbi.c */
void cx18_av_vbi_setup(struct cx18 *cx);
int cx18_av_vbi(struct cx18 *cx, unsigned int cmd, void *arg);
#endif
/*
* cx18 ADEC firmware functions
*
* Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
* 02110-1301, USA.
*/
#include "cx18-driver.h"
#include <linux/firmware.h>
#define FWFILE "v4l-cx23418-dig.fw"
int cx18_av_loadfw(struct cx18 *cx)
{
const struct firmware *fw = NULL;
u32 size;
u32 v;
u8 *ptr;
int i;
if (request_firmware(&fw, FWFILE, &cx->dev->dev) != 0) {
CX18_ERR("unable to open firmware %s\n", FWFILE);
return -EINVAL;
}
cx18_av_write4(cx, CXADEC_CHIP_CTRL, 0x00010000);
cx18_av_write(cx, CXADEC_STD_DET_CTL, 0xf6); /* Byte 0 */
/* Reset the Mako core (Register is undocumented.) */
cx18_av_write4(cx, 0x8100, 0x00010000);
/* Put the 8051 in reset and enable firmware upload */
cx18_av_write4(cx, CXADEC_DL_CTL, 0x0F000000);
ptr = fw->data;
size = fw->size;
for (i = 0; i < size; i++) {
u32 dl_control = 0x0F000000 | ((u32)ptr[i] << 16);
u32 value = 0;
int retries;
for (retries = 0; retries < 5; retries++) {
cx18_av_write4(cx, CXADEC_DL_CTL, dl_control);
value = cx18_av_read4(cx, CXADEC_DL_CTL);
if ((value & 0x3F00) == (dl_control & 0x3F00))
break;
}
if (retries >= 5) {
CX18_ERR("unable to load firmware %s\n", FWFILE);
release_firmware(fw);
return -EIO;
}
}
cx18_av_write4(cx, CXADEC_DL_CTL, 0x13000000 | fw->size);
/* Output to the 416 */
cx18_av_and_or4(cx, CXADEC_PIN_CTRL1, ~0, 0x78000);
/* Audio input control 1 set to Sony mode */
/* Audio output input 2 is 0 for slave operation input */
/* 0xC4000914[5]: 0 = left sample on WS=0, 1 = left sample on WS=1 */
/* 0xC4000914[7]: 0 = Philips mode, 1 = Sony mode (1st SCK rising edge
after WS transition for first bit of audio word. */
cx18_av_write4(cx, CXADEC_I2S_IN_CTL, 0x000000A0);
/* Audio output control 1 is set to Sony mode */
/* Audio output control 2 is set to 1 for master mode */
/* 0xC4000918[5]: 0 = left sample on WS=0, 1 = left sample on WS=1 */
/* 0xC4000918[7]: 0 = Philips mode, 1 = Sony mode (1st SCK rising edge
after WS transition for first bit of audio word. */
/* 0xC4000918[8]: 0 = slave operation, 1 = master (SCK_OUT and WS_OUT
are generated) */
cx18_av_write4(cx, CXADEC_I2S_OUT_CTL, 0x000001A0);
/* set alt I2s master clock to /16 and enable alt divider i2s
passthrough */
cx18_av_write4(cx, CXADEC_PIN_CFG3, 0x5000B687);
cx18_av_write4(cx, CXADEC_STD_DET_CTL, 0x000000F6);
/* CxDevWrReg(CXADEC_STD_DET_CTL, 0x000000FF); */
/* Set bit 0 in register 0x9CC to signify that this is MiniMe. */
/* Register 0x09CC is defined by the Merlin firmware, and doesn't
have a name in the spec. */
cx18_av_write4(cx, 0x09CC, 1);
#define CX18_AUDIO_ENABLE 0xc72014
v = read_reg(CX18_AUDIO_ENABLE);
/* If bit 11 is 1 */
if (v & 0x800)
write_reg(v & 0xFFFFFBFF, CX18_AUDIO_ENABLE); /* Clear bit 10 */
/* Enable WW auto audio standard detection */
v = cx18_av_read4(cx, CXADEC_STD_DET_CTL);
v |= 0xFF; /* Auto by default */
v |= 0x400; /* Stereo by default */
v |= 0x14000000;
cx18_av_write4(cx, CXADEC_STD_DET_CTL, v);
release_firmware(fw);
CX18_INFO("loaded %s firmware (%d bytes)\n", FWFILE, size);
return 0;
}
/*
* cx18 ADEC VBI functions
*
* Derived from cx25840-vbi.c
*
* Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
* 02110-1301, USA.
*/
#include "cx18-driver.h"
static int odd_parity(u8 c)
{
c ^= (c >> 4);
c ^= (c >> 2);
c ^= (c >> 1);
return c & 1;
}
static int decode_vps(u8 *dst, u8 *p)
{
static const u8 biphase_tbl[] = {
0xf0, 0x78, 0x70, 0xf0, 0xb4, 0x3c, 0x34, 0xb4,
0xb0, 0x38, 0x30, 0xb0, 0xf0, 0x78, 0x70, 0xf0,
0xd2, 0x5a, 0x52, 0xd2, 0x96, 0x1e, 0x16, 0x96,
0x92, 0x1a, 0x12, 0x92, 0xd2, 0x5a, 0x52, 0xd2,
0xd0, 0x58, 0x50, 0xd0, 0x94, 0x1c, 0x14, 0x94,
0x90, 0x18, 0x10, 0x90, 0xd0, 0x58, 0x50, 0xd0,
0xf0, 0x78, 0x70, 0xf0, 0xb4, 0x3c, 0x34, 0xb4,
0xb0, 0x38, 0x30, 0xb0, 0xf0, 0x78, 0x70, 0xf0,
0xe1, 0x69, 0x61, 0xe1, 0xa5, 0x2d, 0x25, 0xa5,
0xa1, 0x29, 0x21, 0xa1, 0xe1, 0x69, 0x61, 0xe1,
0xc3, 0x4b, 0x43, 0xc3, 0x87, 0x0f, 0x07, 0x87,
0x83, 0x0b, 0x03, 0x83, 0xc3, 0x4b, 0x43, 0xc3,
0xc1, 0x49, 0x41, 0xc1, 0x85, 0x0d, 0x05, 0x85,
0x81, 0x09, 0x01, 0x81, 0xc1, 0x49, 0x41, 0xc1,
0xe1, 0x69, 0x61, 0xe1, 0xa5, 0x2d, 0x25, 0xa5,
0xa1, 0x29, 0x21, 0xa1, 0xe1, 0x69, 0x61, 0xe1,
0xe0, 0x68, 0x60, 0xe0, 0xa4, 0x2c, 0x24, 0xa4,
0xa0, 0x28, 0x20, 0xa0, 0xe0, 0x68, 0x60, 0xe0,
0xc2, 0x4a, 0x42, 0xc2, 0x86, 0x0e, 0x06, 0x86,
0x82, 0x0a, 0x02, 0x82, 0xc2, 0x4a, 0x42, 0xc2,
0xc0, 0x48, 0x40, 0xc0, 0x84, 0x0c, 0x04, 0x84,
0x80, 0x08, 0x00, 0x80, 0xc0, 0x48, 0x40, 0xc0,
0xe0, 0x68, 0x60, 0xe0, 0xa4, 0x2c, 0x24, 0xa4,
0xa0, 0x28, 0x20, 0xa0, 0xe0, 0x68, 0x60, 0xe0,
0xf0, 0x78, 0x70, 0xf0, 0xb4, 0x3c, 0x34, 0xb4,
0xb0, 0x38, 0x30, 0xb0, 0xf0, 0x78, 0x70, 0xf0,
0xd2, 0x5a, 0x52, 0xd2, 0x96, 0x1e, 0x16, 0x96,
0x92, 0x1a, 0x12, 0x92, 0xd2, 0x5a, 0x52, 0xd2,
0xd0, 0x58, 0x50, 0xd0, 0x94, 0x1c, 0x14, 0x94,
0x90, 0x18, 0x10, 0x90, 0xd0, 0x58, 0x50, 0xd0,
0xf0, 0x78, 0x70, 0xf0, 0xb4, 0x3c, 0x34, 0xb4,
0xb0, 0x38, 0x30, 0xb0, 0xf0, 0x78, 0x70, 0xf0,
};
u8 c, err = 0;
int i;
for (i = 0; i < 2 * 13; i += 2) {
err |= biphase_tbl[p[i]] | biphase_tbl[p[i + 1]];
c = (biphase_tbl[p[i + 1]] & 0xf) |
((biphase_tbl[p[i]] & 0xf) << 4);
dst[i / 2] = c;
}
return err & 0xf0;
}
void cx18_av_vbi_setup(struct cx18 *cx)
{
struct cx18_av_state *state = &cx->av_state;
v4l2_std_id std = state->std;
int hblank, hactive, burst, vblank, vactive, sc;
int vblank656, src_decimation;
int luma_lpf, uv_lpf, comb;
u32 pll_int, pll_frac, pll_post;
/* datasheet startup, step 8d */
if (std & ~V4L2_STD_NTSC)
cx18_av_write(cx, 0x49f, 0x11);
else
cx18_av_write(cx, 0x49f, 0x14);
if (std & V4L2_STD_625_50) {
hblank = 0x084;
hactive = 0x2d0;
burst = 0x5d;
vblank = 0x024;
vactive = 0x244;
vblank656 = 0x28;
src_decimation = 0x21f;
luma_lpf = 2;
if (std & V4L2_STD_SECAM) {
uv_lpf = 0;
comb = 0;
sc = 0x0a425f;
} else if (std == V4L2_STD_PAL_Nc) {
uv_lpf = 1;
comb = 0x20;
sc = 556453;
} else {
uv_lpf = 1;
comb = 0x20;
sc = 0x0a8263;
}
} else {
hactive = 720;
hblank = 122;
vactive = 487;
luma_lpf = 1;
uv_lpf = 1;
src_decimation = 0x21f;
if (std == V4L2_STD_PAL_60) {
vblank = 26;
vblank656 = 26;
burst = 0x5b;
luma_lpf = 2;
comb = 0x20;
sc = 0x0a8263;
} else if (std == V4L2_STD_PAL_M) {
vblank = 20;
vblank656 = 24;
burst = 0x61;
comb = 0x20;
sc = 555452;
} else {
vblank = 26;
vblank656 = 26;
burst = 0x5b;
comb = 0x66;
sc = 556063;
}
}
/* DEBUG: Displays configured PLL frequency */
pll_int = cx18_av_read(cx, 0x108);
pll_frac = cx18_av_read4(cx, 0x10c) & 0x1ffffff;
pll_post = cx18_av_read(cx, 0x109);
CX18_DEBUG_INFO("PLL regs = int: %u, frac: %u, post: %u\n",
pll_int, pll_frac, pll_post);
if (pll_post) {
int fin, fsc;
int pll = 28636363L * ((((u64)pll_int) << 25) + pll_frac);
pll >>= 25;
pll /= pll_post;
CX18_DEBUG_INFO("PLL = %d.%06d MHz\n",
pll / 1000000, pll % 1000000);
CX18_DEBUG_INFO("PLL/8 = %d.%06d MHz\n",
pll / 8000000, (pll / 8) % 1000000);
fin = ((u64)src_decimation * pll) >> 12;
CX18_DEBUG_INFO("ADC Sampling freq = %d.%06d MHz\n",
fin / 1000000, fin % 1000000);
fsc = (((u64)sc) * pll) >> 24L;
CX18_DEBUG_INFO("Chroma sub-carrier freq = %d.%06d MHz\n",
fsc / 1000000, fsc % 1000000);
CX18_DEBUG_INFO("hblank %i, hactive %i, "
"vblank %i , vactive %i, vblank656 %i, src_dec %i,"
"burst 0x%02x, luma_lpf %i, uv_lpf %i, comb 0x%02x,"
" sc 0x%06x\n",
hblank, hactive, vblank, vactive, vblank656,
src_decimation, burst, luma_lpf, uv_lpf, comb, sc);
}
/* Sets horizontal blanking delay and active lines */
cx18_av_write(cx, 0x470, hblank);
cx18_av_write(cx, 0x471, 0xff & (((hblank >> 8) & 0x3) |
(hactive << 4)));
cx18_av_write(cx, 0x472, hactive >> 4);
/* Sets burst gate delay */
cx18_av_write(cx, 0x473, burst);
/* Sets vertical blanking delay and active duration */
cx18_av_write(cx, 0x474, vblank);
cx18_av_write(cx, 0x475, 0xff & (((vblank >> 8) & 0x3) |
(vactive << 4)));
cx18_av_write(cx, 0x476, vactive >> 4);
cx18_av_write(cx, 0x477, vblank656);
/* Sets src decimation rate */
cx18_av_write(cx, 0x478, 0xff & src_decimation);
cx18_av_write(cx, 0x479, 0xff & (src_decimation >> 8));
/* Sets Luma and UV Low pass filters */
cx18_av_write(cx, 0x47a, luma_lpf << 6 | ((uv_lpf << 4) & 0x30));
/* Enables comb filters */
cx18_av_write(cx, 0x47b, comb);
/* Sets SC Step*/
cx18_av_write(cx, 0x47c, sc);
cx18_av_write(cx, 0x47d, 0xff & sc >> 8);
cx18_av_write(cx, 0x47e, 0xff & sc >> 16);
/* Sets VBI parameters */
if (std & V4L2_STD_625_50) {
cx18_av_write(cx, 0x47f, 0x01);
state->vbi_line_offset = 5;
} else {
cx18_av_write(cx, 0x47f, 0x00);
state->vbi_line_offset = 8;
}
}
int cx18_av_vbi(struct cx18 *cx, unsigned int cmd, void *arg)
{
struct cx18_av_state *state = &cx->av_state;
struct v4l2_format *fmt;
struct v4l2_sliced_vbi_format *svbi;
switch (cmd) {
case VIDIOC_G_FMT:
{
static u16 lcr2vbi[] = {
0, V4L2_SLICED_TELETEXT_B, 0, /* 1 */
0, V4L2_SLICED_WSS_625, 0, /* 4 */
V4L2_SLICED_CAPTION_525, /* 6 */
0, 0, V4L2_SLICED_VPS, 0, 0, /* 9 */
0, 0, 0, 0
};
int is_pal = !(state->std & V4L2_STD_525_60);
int i;
fmt = arg;
if (fmt->type != V4L2_BUF_TYPE_SLICED_VBI_CAPTURE)
return -EINVAL;
svbi = &fmt->fmt.sliced;
memset(svbi, 0, sizeof(*svbi));
/* we're done if raw VBI is active */
if ((cx18_av_read(cx, 0x404) & 0x10) == 0)
break;
if (is_pal) {
for (i = 7; i <= 23; i++) {
u8 v = cx18_av_read(cx, 0x424 + i - 7);
svbi->service_lines[0][i] = lcr2vbi[v >> 4];
svbi->service_lines[1][i] = lcr2vbi[v & 0xf];
svbi->service_set |= svbi->service_lines[0][i] |
svbi->service_lines[1][i];
}
} else {
for (i = 10; i <= 21; i++) {
u8 v = cx18_av_read(cx, 0x424 + i - 10);
svbi->service_lines[0][i] = lcr2vbi[v >> 4];
svbi->service_lines[1][i] = lcr2vbi[v & 0xf];
svbi->service_set |= svbi->service_lines[0][i] |
svbi->service_lines[1][i];
}
}
break;
}
case VIDIOC_S_FMT:
{
int is_pal = !(state->std & V4L2_STD_525_60);
int vbi_offset = is_pal ? 1 : 0;
int i, x;
u8 lcr[24];
fmt = arg;
if (fmt->type != V4L2_BUF_TYPE_SLICED_VBI_CAPTURE)
return -EINVAL;
svbi = &fmt->fmt.sliced;
if (svbi->service_set == 0) {
/* raw VBI */
memset(svbi, 0, sizeof(*svbi));
/* Setup VBI */
cx18_av_vbi_setup(cx);
/* VBI Offset */
cx18_av_write(cx, 0x47f, vbi_offset);
cx18_av_write(cx, 0x404, 0x2e);
break;
}
for (x = 0; x <= 23; x++)
lcr[x] = 0x00;
/* Setup VBI */
cx18_av_vbi_setup(cx);
/* Sliced VBI */
cx18_av_write(cx, 0x404, 0x32); /* Ancillary data */
cx18_av_write(cx, 0x406, 0x13);
cx18_av_write(cx, 0x47f, vbi_offset);
if (is_pal) {
for (i = 0; i <= 6; i++)
svbi->service_lines[0][i] =
svbi->service_lines[1][i] = 0;
} else {
for (i = 0; i <= 9; i++)
svbi->service_lines[0][i] =
svbi->service_lines[1][i] = 0;
for (i = 22; i <= 23; i++)
svbi->service_lines[0][i] =
svbi->service_lines[1][i] = 0;
}
for (i = 7; i <= 23; i++) {
for (x = 0; x <= 1; x++) {
switch (svbi->service_lines[1-x][i]) {
case V4L2_SLICED_TELETEXT_B:
lcr[i] |= 1 << (4 * x);
break;
case V4L2_SLICED_WSS_625:
lcr[i] |= 4 << (4 * x);
break;
case V4L2_SLICED_CAPTION_525:
lcr[i] |= 6 << (4 * x);
break;
case V4L2_SLICED_VPS:
lcr[i] |= 9 << (4 * x);
break;
}
}
}
if (is_pal) {
for (x = 1, i = 0x424; i <= 0x434; i++, x++)
cx18_av_write(cx, i, lcr[6 + x]);
} else {
for (x = 1, i = 0x424; i <= 0x430; i++, x++)
cx18_av_write(cx, i, lcr[9 + x]);
for (i = 0x431; i <= 0x434; i++)
cx18_av_write(cx, i, 0);
}
cx18_av_write(cx, 0x43c, 0x16);
cx18_av_write(cx, 0x474, is_pal ? 0x2a : 0x22);
break;
}
case VIDIOC_INT_DECODE_VBI_LINE:
{
struct v4l2_decode_vbi_line *vbi = arg;
u8 *p = vbi->p;
int id1, id2, l, err = 0;
if (p[0] || p[1] != 0xff || p[2] != 0xff ||
(p[3] != 0x55 && p[3] != 0x91)) {
vbi->line = vbi->type = 0;
break;
}
p += 4;
id1 = p[-1];
id2 = p[0] & 0xf;
l = p[2] & 0x3f;
l += state->vbi_line_offset;
p += 4;
switch (id2) {
case 1:
id2 = V4L2_SLICED_TELETEXT_B;
break;
case 4:
id2 = V4L2_SLICED_WSS_625;
break;
case 6:
id2 = V4L2_SLICED_CAPTION_525;
err = !odd_parity(p[0]) || !odd_parity(p[1]);
break;
case 9:
id2 = V4L2_SLICED_VPS;
if (decode_vps(p, p) != 0)
err = 1;
break;
default:
id2 = 0;
err = 1;
break;
}
vbi->type = err ? 0 : id2;
vbi->line = err ? 0 : l;
vbi->is_second_field = err ? 0 : (id1 == 0x55);
vbi->p = p;
break;
}
}
return 0;
}
/*
* cx18 functions to query card hardware
*
* Derived from ivtv-cards.c
*
* Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
* 02111-1307 USA
*/
#include "cx18-driver.h"
#include "cx18-cards.h"
#include "cx18-i2c.h"
#include <media/cs5345.h>
/********************** card configuration *******************************/
/* usual i2c tuner addresses to probe */
static struct cx18_card_tuner_i2c cx18_i2c_std = {
.radio = { I2C_CLIENT_END },
.demod = { 0x43, I2C_CLIENT_END },
.tv = { 0x61, 0x60, I2C_CLIENT_END },
};
/* Please add new PCI IDs to: http://pci-ids.ucw.cz/iii
This keeps the PCI ID database up to date. Note that the entries
must be added under vendor 0x4444 (Conexant) as subsystem IDs.
New vendor IDs should still be added to the vendor ID list. */
/* Hauppauge HVR-1600 cards */
/* Note: for Hauppauge cards the tveeprom information is used instead
of PCI IDs */
static const struct cx18_card cx18_card_hvr1600_esmt = {
.type = CX18_CARD_HVR_1600_ESMT,
.name = "Hauppauge HVR-1600",
.comment = "DVB & VBI are not yet supported\n",
.v4l2_capabilities = CX18_CAP_ENCODER,
.hw_audio_ctrl = CX18_HW_CX23418,
.hw_muxer = CX18_HW_CS5345,
.hw_all = CX18_HW_TVEEPROM | CX18_HW_TUNER | CX18_HW_CS5345,
.video_inputs = {
{ CX18_CARD_INPUT_VID_TUNER, 0, CX23418_COMPOSITE7 },
{ CX18_CARD_INPUT_SVIDEO1, 1, CX23418_SVIDEO1 },
{ CX18_CARD_INPUT_COMPOSITE1, 1, CX23418_COMPOSITE3 },
{ CX18_CARD_INPUT_SVIDEO2, 2, CX23418_SVIDEO2 },
{ CX18_CARD_INPUT_COMPOSITE2, 2, CX23418_COMPOSITE4 },
},
.audio_inputs = {
{ CX18_CARD_INPUT_AUD_TUNER,
CX23418_AUDIO8, CS5345_IN_1 | CS5345_MCLK_1_5 },
{ CX18_CARD_INPUT_LINE_IN1,
CX23418_AUDIO_SERIAL, CS5345_IN_2 },
{ CX18_CARD_INPUT_LINE_IN2,
CX23418_AUDIO_SERIAL, CS5345_IN_2 },
},
.radio_input = { CX18_CARD_INPUT_AUD_TUNER,
CX23418_AUDIO_SERIAL, 0 },
.ddr = {
/* ESMT M13S128324A-5B memory */
.chip_config = 0x003,
.refresh = 0x30c,
.timing1 = 0x44220e82,
.timing2 = 0x08,
.tune_lane = 0,
.initial_emrs = 0,
},
.gpio_init.initial_value = 0x3001,
.gpio_init.direction = 0x3001,
.i2c = &cx18_i2c_std,
};
static const struct cx18_card cx18_card_hvr1600_samsung = {
.type = CX18_CARD_HVR_1600_SAMSUNG,
.name = "Hauppauge HVR-1600 (Preproduction)",
.comment = "DVB & VBI are not yet supported\n",
.v4l2_capabilities = CX18_CAP_ENCODER,
.hw_audio_ctrl = CX18_HW_CX23418,
.hw_muxer = CX18_HW_CS5345,
.hw_all = CX18_HW_TVEEPROM | CX18_HW_TUNER | CX18_HW_CS5345,
.video_inputs = {
{ CX18_CARD_INPUT_VID_TUNER, 0, CX23418_COMPOSITE7 },
{ CX18_CARD_INPUT_SVIDEO1, 1, CX23418_SVIDEO1 },
{ CX18_CARD_INPUT_COMPOSITE1, 1, CX23418_COMPOSITE3 },
{ CX18_CARD_INPUT_SVIDEO2, 2, CX23418_SVIDEO2 },
{ CX18_CARD_INPUT_COMPOSITE2, 2, CX23418_COMPOSITE4 },
},
.audio_inputs = {
{ CX18_CARD_INPUT_AUD_TUNER,
CX23418_AUDIO8, CS5345_IN_1 | CS5345_MCLK_1_5 },
{ CX18_CARD_INPUT_LINE_IN1,
CX23418_AUDIO_SERIAL, CS5345_IN_2 },
{ CX18_CARD_INPUT_LINE_IN2,
CX23418_AUDIO_SERIAL, CS5345_IN_2 },
},
.radio_input = { CX18_CARD_INPUT_AUD_TUNER,
CX23418_AUDIO_SERIAL, 0 },
.ddr = {
/* Samsung K4D263238G-VC33 memory */
.chip_config = 0x003,
.refresh = 0x30c,
.timing1 = 0x23230b73,
.timing2 = 0x08,
.tune_lane = 0,
.initial_emrs = 2,
},
.gpio_init.initial_value = 0x3001,
.gpio_init.direction = 0x3001,
.i2c = &cx18_i2c_std,
};
/* ------------------------------------------------------------------------- */
/* Compro VideoMate H900: not working at the moment! */
static const struct cx18_card_pci_info cx18_pci_h900[] = {
{ PCI_DEVICE_ID_CX23418, CX18_PCI_ID_COMPRO, 0xe100 },
{ 0, 0, 0 }
};
static const struct cx18_card cx18_card_h900 = {
.type = CX18_CARD_COMPRO_H900,
.name = "Compro VideoMate H900",
.comment = "Not yet supported!\n",
.v4l2_capabilities = 0,
.hw_audio_ctrl = CX18_HW_CX23418,
.hw_all = CX18_HW_TUNER,
.video_inputs = {
{ CX18_CARD_INPUT_VID_TUNER, 0, CX23418_COMPOSITE7 },
{ CX18_CARD_INPUT_SVIDEO1, 1, CX23418_SVIDEO1 },
{ CX18_CARD_INPUT_COMPOSITE1, 1, CX23418_COMPOSITE3 },
},
.audio_inputs = {
{ CX18_CARD_INPUT_AUD_TUNER,
CX23418_AUDIO8, 0 },
{ CX18_CARD_INPUT_LINE_IN1,
CX23418_AUDIO_SERIAL, 0 },
},
.radio_input = { CX18_CARD_INPUT_AUD_TUNER,
CX23418_AUDIO_SERIAL, 0 },
.tuners = {
{ .std = V4L2_STD_ALL, .tuner = TUNER_XC2028 },
},
.ddr = {
/* EtronTech EM6A9160TS-5G memory */
.chip_config = 0x50003,
.refresh = 0x753,
.timing1 = 0x24330e84,
.timing2 = 0x1f,
.tune_lane = 0,
.initial_emrs = 0,
},
.pci_list = cx18_pci_h900,
.i2c = &cx18_i2c_std,
};
/* ------------------------------------------------------------------------- */
/* Yuan MPC718: not working at the moment! */
static const struct cx18_card_pci_info cx18_pci_mpc718[] = {
{ PCI_DEVICE_ID_CX23418, CX18_PCI_ID_YUAN, 0x0718 },
{ 0, 0, 0 }
};
static const struct cx18_card cx18_card_mpc718 = {
.type = CX18_CARD_YUAN_MPC718,
.name = "Yuan MPC718",
.comment = "Not yet supported!\n",
.v4l2_capabilities = 0,
.hw_audio_ctrl = CX18_HW_CX23418,
.hw_all = CX18_HW_TUNER,
.video_inputs = {
{ CX18_CARD_INPUT_VID_TUNER, 0, CX23418_COMPOSITE7 },
{ CX18_CARD_INPUT_SVIDEO1, 1, CX23418_SVIDEO1 },
{ CX18_CARD_INPUT_COMPOSITE1, 1, CX23418_COMPOSITE3 },
},
.audio_inputs = {
{ CX18_CARD_INPUT_AUD_TUNER,
CX23418_AUDIO8, 0 },
{ CX18_CARD_INPUT_LINE_IN1,
CX23418_AUDIO_SERIAL, 0 },
},
.radio_input = { CX18_CARD_INPUT_AUD_TUNER,
CX23418_AUDIO_SERIAL, 0 },
.tuners = {
/* XC3028 tuner */
{ .std = V4L2_STD_ALL, .tuner = TUNER_XC2028 },
},
/* tuner reset */
.gpio_init = { .direction = 0x1000, .initial_value = 0x1000 },
.ddr = {
/* Probably Samsung K4D263238G-VC33 memory */
.chip_config = 0x003,
.refresh = 0x30c,
.timing1 = 0x23230b73,
.timing2 = 0x08,
.tune_lane = 0,
.initial_emrs = 2,
},
.pci_list = cx18_pci_mpc718,
.i2c = &cx18_i2c_std,
};
static const struct cx18_card *cx18_card_list[] = {
&cx18_card_hvr1600_esmt,
&cx18_card_hvr1600_samsung,
&cx18_card_h900,
&cx18_card_mpc718,
};
const struct cx18_card *cx18_get_card(u16 index)
{
if (index >= ARRAY_SIZE(cx18_card_list))
return NULL;
return cx18_card_list[index];
}
int cx18_get_input(struct cx18 *cx, u16 index, struct v4l2_input *input)
{
const struct cx18_card_video_input *card_input =
cx->card->video_inputs + index;
static const char * const input_strs[] = {
"Tuner 1",
"S-Video 1",
"S-Video 2",
"Composite 1",
"Composite 2",
"Composite 3"
};
memset(input, 0, sizeof(*input));
if (index >= cx->nof_inputs)
return -EINVAL;
input->index = index;
strlcpy(input->name, input_strs[card_input->video_type - 1],
sizeof(input->name));
input->type = (card_input->video_type == CX18_CARD_INPUT_VID_TUNER ?
V4L2_INPUT_TYPE_TUNER : V4L2_INPUT_TYPE_CAMERA);
input->audioset = (1 << cx->nof_audio_inputs) - 1;
input->std = (input->type == V4L2_INPUT_TYPE_TUNER) ?
cx->tuner_std : V4L2_STD_ALL;
return 0;
}
int cx18_get_audio_input(struct cx18 *cx, u16 index, struct v4l2_audio *audio)
{
const struct cx18_card_audio_input *aud_input =
cx->card->audio_inputs + index;
static const char * const input_strs[] = {
"Tuner 1",
"Line In 1",
"Line In 2"
};
memset(audio, 0, sizeof(*audio));
if (index >= cx->nof_audio_inputs)
return -EINVAL;
strlcpy(audio->name, input_strs[aud_input->audio_type - 1],
sizeof(audio->name));
audio->index = index;
audio->capability = V4L2_AUDCAP_STEREO;
return 0;
}
/*
* cx18 functions to query card hardware
*
* Derived from ivtv-cards.c
*
* Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/* hardware flags */
#define CX18_HW_TUNER (1 << 0)
#define CX18_HW_TVEEPROM (1 << 1)
#define CX18_HW_CS5345 (1 << 2)
#define CX18_HW_GPIO (1 << 3)
#define CX18_HW_CX23418 (1 << 4)
#define CX18_HW_DVB (1 << 5)
/* video inputs */
#define CX18_CARD_INPUT_VID_TUNER 1
#define CX18_CARD_INPUT_SVIDEO1 2
#define CX18_CARD_INPUT_SVIDEO2 3
#define CX18_CARD_INPUT_COMPOSITE1 4
#define CX18_CARD_INPUT_COMPOSITE2 5
#define CX18_CARD_INPUT_COMPOSITE3 6
enum cx34180_video_input {
/* Composite video inputs In1-In8 */
CX23418_COMPOSITE1 = 1,
CX23418_COMPOSITE2,
CX23418_COMPOSITE3,
CX23418_COMPOSITE4,
CX23418_COMPOSITE5,
CX23418_COMPOSITE6,
CX23418_COMPOSITE7,
CX23418_COMPOSITE8,
/* S-Video inputs consist of one luma input (In1-In4) ORed with one
chroma input (In5-In8) */
CX23418_SVIDEO_LUMA1 = 0x10,
CX23418_SVIDEO_LUMA2 = 0x20,
CX23418_SVIDEO_LUMA3 = 0x30,
CX23418_SVIDEO_LUMA4 = 0x40,
CX23418_SVIDEO_CHROMA4 = 0x400,
CX23418_SVIDEO_CHROMA5 = 0x500,
CX23418_SVIDEO_CHROMA6 = 0x600,
CX23418_SVIDEO_CHROMA7 = 0x700,
CX23418_SVIDEO_CHROMA8 = 0x800,
/* S-Video aliases for common luma/chroma combinations */
CX23418_SVIDEO1 = 0x510,
CX23418_SVIDEO2 = 0x620,
CX23418_SVIDEO3 = 0x730,
CX23418_SVIDEO4 = 0x840,
};
/* audio inputs */
#define CX18_CARD_INPUT_AUD_TUNER 1
#define CX18_CARD_INPUT_LINE_IN1 2
#define CX18_CARD_INPUT_LINE_IN2 3
#define CX18_CARD_MAX_VIDEO_INPUTS 6
#define CX18_CARD_MAX_AUDIO_INPUTS 3
#define CX18_CARD_MAX_TUNERS 2
enum cx23418_audio_input {
/* Audio inputs: serial or In4-In8 */
CX23418_AUDIO_SERIAL,
CX23418_AUDIO4 = 4,
CX23418_AUDIO5,
CX23418_AUDIO6,
CX23418_AUDIO7,
CX23418_AUDIO8,
};
/* V4L2 capability aliases */
#define CX18_CAP_ENCODER (V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_TUNER | \
V4L2_CAP_AUDIO | V4L2_CAP_READWRITE)
/* | V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE) not yet */
struct cx18_card_video_input {
u8 video_type; /* video input type */
u8 audio_index; /* index in cx18_card_audio_input array */
u16 video_input; /* hardware video input */
};
struct cx18_card_audio_input {
u8 audio_type; /* audio input type */
u32 audio_input; /* hardware audio input */
u16 muxer_input; /* hardware muxer input for boards with a
multiplexer chip */
};
struct cx18_card_pci_info {
u16 device;
u16 subsystem_vendor;
u16 subsystem_device;
};
/* GPIO definitions */
/* The mask is the set of bits used by the operation */
struct cx18_gpio_init { /* set initial GPIO DIR and OUT values */
u16 direction; /* DIR setting. Leave to 0 if no init is needed */
u16 initial_value;
};
struct cx18_card_tuner {
v4l2_std_id std; /* standard for which the tuner is suitable */
int tuner; /* tuner ID (from tuner.h) */
};
struct cx18_card_tuner_i2c {
unsigned short radio[2];/* radio tuner i2c address to probe */
unsigned short demod[2];/* demodulator i2c address to probe */
unsigned short tv[4]; /* tv tuner i2c addresses to probe */
};
struct cx18_ddr { /* DDR config data */
u32 chip_config;
u32 refresh;
u32 timing1;
u32 timing2;
u32 tune_lane;
u32 initial_emrs;
};
/* for card information/parameters */
struct cx18_card {
int type;
char *name;
char *comment;
u32 v4l2_capabilities;
u32 hw_audio_ctrl; /* hardware used for the V4L2 controls (only
1 dev allowed) */
u32 hw_muxer; /* hardware used to multiplex audio input */
u32 hw_all; /* all hardware used by the board */
struct cx18_card_video_input video_inputs[CX18_CARD_MAX_VIDEO_INPUTS];
struct cx18_card_audio_input audio_inputs[CX18_CARD_MAX_AUDIO_INPUTS];
struct cx18_card_audio_input radio_input;
/* GPIO card-specific settings */
struct cx18_gpio_init gpio_init;
struct cx18_card_tuner tuners[CX18_CARD_MAX_TUNERS];
struct cx18_card_tuner_i2c *i2c;
struct cx18_ddr ddr;
/* list of device and subsystem vendor/devices that
correspond to this card type. */
const struct cx18_card_pci_info *pci_list;
};
int cx18_get_input(struct cx18 *cx, u16 index, struct v4l2_input *input);
int cx18_get_audio_input(struct cx18 *cx, u16 index, struct v4l2_audio *input);
const struct cx18_card *cx18_get_card(u16 index);
/*
* cx18 ioctl control functions
*
* Derived from ivtv-controls.c
*
* Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
* 02111-1307 USA
*/
#include "cx18-driver.h"
#include "cx18-av-core.h"
#include "cx18-cards.h"
#include "cx18-ioctl.h"
#include "cx18-audio.h"
#include "cx18-i2c.h"
#include "cx18-mailbox.h"
#include "cx18-controls.h"
static const u32 user_ctrls[] = {
V4L2_CID_USER_CLASS,
V4L2_CID_BRIGHTNESS,
V4L2_CID_CONTRAST,
V4L2_CID_SATURATION,
V4L2_CID_HUE,
V4L2_CID_AUDIO_VOLUME,
V4L2_CID_AUDIO_BALANCE,
V4L2_CID_AUDIO_BASS,
V4L2_CID_AUDIO_TREBLE,
V4L2_CID_AUDIO_MUTE,
V4L2_CID_AUDIO_LOUDNESS,
0
};
static const u32 *ctrl_classes[] = {
user_ctrls,
cx2341x_mpeg_ctrls,
NULL
};
static int cx18_queryctrl(struct cx18 *cx, struct v4l2_queryctrl *qctrl)
{
const char *name;
CX18_DEBUG_IOCTL("VIDIOC_QUERYCTRL(%08x)\n", qctrl->id);
qctrl->id = v4l2_ctrl_next(ctrl_classes, qctrl->id);
if (qctrl->id == 0)
return -EINVAL;
switch (qctrl->id) {
/* Standard V4L2 controls */
case V4L2_CID_BRIGHTNESS:
case V4L2_CID_HUE:
case V4L2_CID_SATURATION:
case V4L2_CID_CONTRAST:
if (cx18_av_cmd(cx, VIDIOC_QUERYCTRL, qctrl))
qctrl->flags |= V4L2_CTRL_FLAG_DISABLED;
return 0;
case V4L2_CID_AUDIO_VOLUME:
case V4L2_CID_AUDIO_MUTE:
case V4L2_CID_AUDIO_BALANCE:
case V4L2_CID_AUDIO_BASS:
case V4L2_CID_AUDIO_TREBLE:
case V4L2_CID_AUDIO_LOUDNESS:
if (cx18_i2c_hw(cx, cx->card->hw_audio_ctrl, VIDIOC_QUERYCTRL, qctrl))
qctrl->flags |= V4L2_CTRL_FLAG_DISABLED;
return 0;
default:
if (cx2341x_ctrl_query(&cx->params, qctrl))
qctrl->flags |= V4L2_CTRL_FLAG_DISABLED;
return 0;
}
strncpy(qctrl->name, name, sizeof(qctrl->name) - 1);
qctrl->name[sizeof(qctrl->name) - 1] = 0;
return 0;
}
static int cx18_querymenu(struct cx18 *cx, struct v4l2_querymenu *qmenu)
{
struct v4l2_queryctrl qctrl;
qctrl.id = qmenu->id;
cx18_queryctrl(cx, &qctrl);
return v4l2_ctrl_query_menu(qmenu, &qctrl, cx2341x_ctrl_get_menu(qmenu->id));
}
static int cx18_s_ctrl(struct cx18 *cx, struct v4l2_control *vctrl)
{
s32 v = vctrl->value;
CX18_DEBUG_IOCTL("VIDIOC_S_CTRL(%08x, %x)\n", vctrl->id, v);
switch (vctrl->id) {
/* Standard V4L2 controls */
case V4L2_CID_BRIGHTNESS:
case V4L2_CID_HUE:
case V4L2_CID_SATURATION:
case V4L2_CID_CONTRAST:
return cx18_av_cmd(cx, VIDIOC_S_CTRL, vctrl);
case V4L2_CID_AUDIO_VOLUME:
case V4L2_CID_AUDIO_MUTE:
case V4L2_CID_AUDIO_BALANCE:
case V4L2_CID_AUDIO_BASS:
case V4L2_CID_AUDIO_TREBLE:
case V4L2_CID_AUDIO_LOUDNESS:
return cx18_i2c_hw(cx, cx->card->hw_audio_ctrl, VIDIOC_S_CTRL, vctrl);
default:
CX18_DEBUG_IOCTL("invalid control %x\n", vctrl->id);
return -EINVAL;
}
return 0;
}
static int cx18_g_ctrl(struct cx18 *cx, struct v4l2_control *vctrl)
{
CX18_DEBUG_IOCTL("VIDIOC_G_CTRL(%08x)\n", vctrl->id);
switch (vctrl->id) {
/* Standard V4L2 controls */
case V4L2_CID_BRIGHTNESS:
case V4L2_CID_HUE:
case V4L2_CID_SATURATION:
case V4L2_CID_CONTRAST:
return cx18_av_cmd(cx, VIDIOC_G_CTRL, vctrl);
case V4L2_CID_AUDIO_VOLUME:
case V4L2_CID_AUDIO_MUTE:
case V4L2_CID_AUDIO_BALANCE:
case V4L2_CID_AUDIO_BASS:
case V4L2_CID_AUDIO_TREBLE:
case V4L2_CID_AUDIO_LOUDNESS:
return cx18_i2c_hw(cx, cx->card->hw_audio_ctrl, VIDIOC_G_CTRL, vctrl);
default:
CX18_DEBUG_IOCTL("invalid control %x\n", vctrl->id);
return -EINVAL;
}
return 0;
}
static int cx18_setup_vbi_fmt(struct cx18 *cx, enum v4l2_mpeg_stream_vbi_fmt fmt)
{
if (!(cx->v4l2_cap & V4L2_CAP_SLICED_VBI_CAPTURE))
return -EINVAL;
if (atomic_read(&cx->capturing) > 0)
return -EBUSY;
/* First try to allocate sliced VBI buffers if needed. */
if (fmt && cx->vbi.sliced_mpeg_data[0] == NULL) {
int i;
for (i = 0; i < CX18_VBI_FRAMES; i++) {
/* Yuck, hardcoded. Needs to be a define */
cx->vbi.sliced_mpeg_data[i] = kmalloc(2049, GFP_KERNEL);
if (cx->vbi.sliced_mpeg_data[i] == NULL) {
while (--i >= 0) {
kfree(cx->vbi.sliced_mpeg_data[i]);
cx->vbi.sliced_mpeg_data[i] = NULL;
}
return -ENOMEM;
}
}
}
cx->vbi.insert_mpeg = fmt;
if (cx->vbi.insert_mpeg == 0)
return 0;
/* Need sliced data for mpeg insertion */
if (get_service_set(cx->vbi.sliced_in) == 0) {
if (cx->is_60hz)
cx->vbi.sliced_in->service_set = V4L2_SLICED_CAPTION_525;
else
cx->vbi.sliced_in->service_set = V4L2_SLICED_WSS_625;
expand_service_set(cx->vbi.sliced_in, cx->is_50hz);
}
return 0;
}
int cx18_control_ioctls(struct cx18 *cx, unsigned int cmd, void *arg)
{
struct v4l2_control ctrl;
switch (cmd) {
case VIDIOC_QUERYMENU:
CX18_DEBUG_IOCTL("VIDIOC_QUERYMENU\n");
return cx18_querymenu(cx, arg);
case VIDIOC_QUERYCTRL:
return cx18_queryctrl(cx, arg);
case VIDIOC_S_CTRL:
return cx18_s_ctrl(cx, arg);
case VIDIOC_G_CTRL:
return cx18_g_ctrl(cx, arg);
case VIDIOC_S_EXT_CTRLS:
{
struct v4l2_ext_controls *c = arg;
if (c->ctrl_class == V4L2_CTRL_CLASS_USER) {
int i;
int err = 0;
for (i = 0; i < c->count; i++) {
ctrl.id = c->controls[i].id;
ctrl.value = c->controls[i].value;
err = cx18_s_ctrl(cx, &ctrl);
c->controls[i].value = ctrl.value;
if (err) {
c->error_idx = i;
break;
}
}
return err;
}
CX18_DEBUG_IOCTL("VIDIOC_S_EXT_CTRLS\n");
if (c->ctrl_class == V4L2_CTRL_CLASS_MPEG) {
struct cx2341x_mpeg_params p = cx->params;
int err = cx2341x_ext_ctrls(&p, atomic_read(&cx->capturing), arg, cmd);
if (err)
return err;
if (p.video_encoding != cx->params.video_encoding) {
int is_mpeg1 = p.video_encoding ==
V4L2_MPEG_VIDEO_ENCODING_MPEG_1;
struct v4l2_format fmt;
/* fix videodecoder resolution */
fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
fmt.fmt.pix.width = cx->params.width / (is_mpeg1 ? 2 : 1);
fmt.fmt.pix.height = cx->params.height;
cx18_av_cmd(cx, VIDIOC_S_FMT, &fmt);
}
err = cx2341x_update(cx, cx18_api_func, &cx->params, &p);
if (!err && cx->params.stream_vbi_fmt != p.stream_vbi_fmt)
err = cx18_setup_vbi_fmt(cx, p.stream_vbi_fmt);
cx->params = p;
cx->dualwatch_stereo_mode = p.audio_properties & 0x0300;
cx18_audio_set_audio_clock_freq(cx, p.audio_properties & 0x03);
return err;
}
return -EINVAL;
}
case VIDIOC_G_EXT_CTRLS:
{
struct v4l2_ext_controls *c = arg;
if (c->ctrl_class == V4L2_CTRL_CLASS_USER) {
int i;
int err = 0;
for (i = 0; i < c->count; i++) {
ctrl.id = c->controls[i].id;
ctrl.value = c->controls[i].value;
err = cx18_g_ctrl(cx, &ctrl);
c->controls[i].value = ctrl.value;
if (err) {
c->error_idx = i;
break;
}
}
return err;
}
CX18_DEBUG_IOCTL("VIDIOC_G_EXT_CTRLS\n");
if (c->ctrl_class == V4L2_CTRL_CLASS_MPEG)
return cx2341x_ext_ctrls(&cx->params, 0, arg, cmd);
return -EINVAL;
}
case VIDIOC_TRY_EXT_CTRLS:
{
struct v4l2_ext_controls *c = arg;
CX18_DEBUG_IOCTL("VIDIOC_TRY_EXT_CTRLS\n");
if (c->ctrl_class == V4L2_CTRL_CLASS_MPEG)
return cx2341x_ext_ctrls(&cx->params,
atomic_read(&cx->capturing), arg, cmd);
return -EINVAL;
}
default:
return -EINVAL;
}
return 0;
}
/*
* cx18 ioctl control functions
*
* Derived from ivtv-controls.h
*
* Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
* 02111-1307 USA
*/
int cx18_control_ioctls(struct cx18 *cx, unsigned int cmd, void *arg);
此差异已折叠。
/*
* cx18 driver internal defines and structures
*
* Derived from ivtv-driver.h
*
* Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
* 02111-1307 USA
*/
#ifndef CX18_DRIVER_H
#define CX18_DRIVER_H
#include <linux/version.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/sched.h>
#include <linux/fs.h>
#include <linux/pci.h>
#include <linux/interrupt.h>
#include <linux/spinlock.h>
#include <linux/i2c.h>
#include <linux/i2c-algo-bit.h>
#include <linux/list.h>
#include <linux/unistd.h>
#include <linux/byteorder/swab.h>
#include <linux/pagemap.h>
#include <linux/workqueue.h>
#include <linux/mutex.h>
#include <linux/dvb/video.h>
#include <linux/dvb/audio.h>
#include <media/v4l2-common.h>
#include <media/tuner.h>
#include "cx18-mailbox.h"
#include "cx18-av-core.h"
#include "cx23418.h"
/* DVB */
#include "demux.h"
#include "dmxdev.h"
#include "dvb_demux.h"
#include "dvb_frontend.h"
#include "dvb_net.h"
#include "dvbdev.h"
#ifndef CONFIG_PCI
# error "This driver requires kernel PCI support."
#endif
#define CX18_MEM_OFFSET 0x00000000
#define CX18_MEM_SIZE 0x04000000
#define CX18_REG_OFFSET 0x02000000
/* Maximum cx18 driver instances. */
#define CX18_MAX_CARDS 32
/* Supported cards */
#define CX18_CARD_HVR_1600_ESMT 0 /* Hauppauge HVR 1600 (ESMT memory) */
#define CX18_CARD_HVR_1600_SAMSUNG 1 /* Hauppauge HVR 1600 (Samsung memory) */
#define CX18_CARD_COMPRO_H900 2 /* Compro VideoMate H900 */
#define CX18_CARD_YUAN_MPC718 3 /* Yuan MPC718 */
#define CX18_CARD_LAST 3
#define CX18_ENC_STREAM_TYPE_MPG 0
#define CX18_ENC_STREAM_TYPE_TS 1
#define CX18_ENC_STREAM_TYPE_YUV 2
#define CX18_ENC_STREAM_TYPE_VBI 3
#define CX18_ENC_STREAM_TYPE_PCM 4
#define CX18_ENC_STREAM_TYPE_IDX 5
#define CX18_ENC_STREAM_TYPE_RAD 6
#define CX18_MAX_STREAMS 7
/* system vendor and device IDs */
#define PCI_VENDOR_ID_CX 0x14f1
#define PCI_DEVICE_ID_CX23418 0x5b7a
/* subsystem vendor ID */
#define CX18_PCI_ID_HAUPPAUGE 0x0070
#define CX18_PCI_ID_COMPRO 0x185b
#define CX18_PCI_ID_YUAN 0x12ab
/* ======================================================================== */
/* ========================== START USER SETTABLE DMA VARIABLES =========== */
/* ======================================================================== */
/* DMA Buffers, Default size in MB allocated */
#define CX18_DEFAULT_ENC_TS_BUFFERS 1
#define CX18_DEFAULT_ENC_MPG_BUFFERS 2
#define CX18_DEFAULT_ENC_IDX_BUFFERS 1
#define CX18_DEFAULT_ENC_YUV_BUFFERS 2
#define CX18_DEFAULT_ENC_VBI_BUFFERS 1
#define CX18_DEFAULT_ENC_PCM_BUFFERS 1
/* i2c stuff */
#define I2C_CLIENTS_MAX 16
/* debugging */
/* Flag to turn on high volume debugging */
#define CX18_DBGFLG_WARN (1 << 0)
#define CX18_DBGFLG_INFO (1 << 1)
#define CX18_DBGFLG_API (1 << 2)
#define CX18_DBGFLG_DMA (1 << 3)
#define CX18_DBGFLG_IOCTL (1 << 4)
#define CX18_DBGFLG_FILE (1 << 5)
#define CX18_DBGFLG_I2C (1 << 6)
#define CX18_DBGFLG_IRQ (1 << 7)
/* Flag to turn on high volume debugging */
#define CX18_DBGFLG_HIGHVOL (1 << 8)
/* NOTE: extra space before comma in 'cx->num , ## args' is required for
gcc-2.95, otherwise it won't compile. */
#define CX18_DEBUG(x, type, fmt, args...) \
do { \
if ((x) & cx18_debug) \
printk(KERN_INFO "cx18-%d " type ": " fmt, cx->num , ## args); \
} while (0)
#define CX18_DEBUG_WARN(fmt, args...) CX18_DEBUG(CX18_DBGFLG_WARN, "warning", fmt , ## args)
#define CX18_DEBUG_INFO(fmt, args...) CX18_DEBUG(CX18_DBGFLG_INFO, "info", fmt , ## args)
#define CX18_DEBUG_API(fmt, args...) CX18_DEBUG(CX18_DBGFLG_API, "api", fmt , ## args)
#define CX18_DEBUG_DMA(fmt, args...) CX18_DEBUG(CX18_DBGFLG_DMA, "dma", fmt , ## args)
#define CX18_DEBUG_IOCTL(fmt, args...) CX18_DEBUG(CX18_DBGFLG_IOCTL, "ioctl", fmt , ## args)
#define CX18_DEBUG_FILE(fmt, args...) CX18_DEBUG(CX18_DBGFLG_FILE, "file", fmt , ## args)
#define CX18_DEBUG_I2C(fmt, args...) CX18_DEBUG(CX18_DBGFLG_I2C, "i2c", fmt , ## args)
#define CX18_DEBUG_IRQ(fmt, args...) CX18_DEBUG(CX18_DBGFLG_IRQ, "irq", fmt , ## args)
#define CX18_DEBUG_HIGH_VOL(x, type, fmt, args...) \
do { \
if (((x) & cx18_debug) && (cx18_debug & CX18_DBGFLG_HIGHVOL)) \
printk(KERN_INFO "cx18%d " type ": " fmt, cx->num , ## args); \
} while (0)
#define CX18_DEBUG_HI_WARN(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_WARN, "warning", fmt , ## args)
#define CX18_DEBUG_HI_INFO(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_INFO, "info", fmt , ## args)
#define CX18_DEBUG_HI_API(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_API, "api", fmt , ## args)
#define CX18_DEBUG_HI_DMA(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_DMA, "dma", fmt , ## args)
#define CX18_DEBUG_HI_IOCTL(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_IOCTL, "ioctl", fmt , ## args)
#define CX18_DEBUG_HI_FILE(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_FILE, "file", fmt , ## args)
#define CX18_DEBUG_HI_I2C(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_I2C, "i2c", fmt , ## args)
#define CX18_DEBUG_HI_IRQ(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_IRQ, "irq", fmt , ## args)
/* Standard kernel messages */
#define CX18_ERR(fmt, args...) printk(KERN_ERR "cx18-%d: " fmt, cx->num , ## args)
#define CX18_WARN(fmt, args...) printk(KERN_WARNING "cx18-%d: " fmt, cx->num , ## args)
#define CX18_INFO(fmt, args...) printk(KERN_INFO "cx18-%d: " fmt, cx->num , ## args)
/* Values for CX18_API_DEC_PLAYBACK_SPEED mpeg_frame_type_mask parameter: */
#define MPEG_FRAME_TYPE_IFRAME 1
#define MPEG_FRAME_TYPE_IFRAME_PFRAME 3
#define MPEG_FRAME_TYPE_ALL 7
#define CX18_MAX_PGM_INDEX (400)
extern int cx18_debug;
struct cx18_options {
int megabytes[CX18_MAX_STREAMS]; /* Size in megabytes of each stream */
int cardtype; /* force card type on load */
int tuner; /* set tuner on load */
int radio; /* enable/disable radio */
};
/* per-buffer bit flags */
#define CX18_F_B_NEED_BUF_SWAP 0 /* this buffer should be byte swapped */
/* per-stream, s_flags */
#define CX18_F_S_CLAIMED 3 /* this stream is claimed */
#define CX18_F_S_STREAMING 4 /* the fw is decoding/encoding this stream */
#define CX18_F_S_INTERNAL_USE 5 /* this stream is used internally (sliced VBI processing) */
#define CX18_F_S_STREAMOFF 7 /* signal end of stream EOS */
#define CX18_F_S_APPL_IO 8 /* this stream is used read/written by an application */
/* per-cx18, i_flags */
#define CX18_F_I_LOADED_FW 0 /* Loaded the firmware the first time */
#define CX18_F_I_EOS 4 /* End of encoder stream reached */
#define CX18_F_I_RADIO_USER 5 /* The radio tuner is selected */
#define CX18_F_I_ENC_PAUSED 13 /* the encoder is paused */
#define CX18_F_I_INITED 21 /* set after first open */
#define CX18_F_I_FAILED 22 /* set if first open failed */
/* These are the VBI types as they appear in the embedded VBI private packets. */
#define CX18_SLICED_TYPE_TELETEXT_B (1)
#define CX18_SLICED_TYPE_CAPTION_525 (4)
#define CX18_SLICED_TYPE_WSS_625 (5)
#define CX18_SLICED_TYPE_VPS (7)
struct cx18_buffer {
struct list_head list;
dma_addr_t dma_handle;
u32 id;
unsigned long b_flags;
char *buf;
u32 bytesused;
u32 readpos;
};
struct cx18_queue {
struct list_head list;
u32 buffers;
u32 length;
u32 bytesused;
};
struct cx18_dvb {
struct dmx_frontend hw_frontend;
struct dmx_frontend mem_frontend;
struct dmxdev dmxdev;
struct dvb_adapter dvb_adapter;
struct dvb_demux demux;
struct dvb_frontend *fe;
struct dvb_net dvbnet;
int enabled;
int feeding;
struct mutex feedlock;
};
struct cx18; /* forward reference */
struct cx18_scb; /* forward reference */
struct cx18_stream {
/* These first four fields are always set, even if the stream
is not actually created. */
struct video_device *v4l2dev; /* NULL when stream not created */
struct cx18 *cx; /* for ease of use */
const char *name; /* name of the stream */
int type; /* stream type */
u32 handle; /* task handle */
unsigned mdl_offset;
u32 id;
spinlock_t qlock; /* locks access to the queues */
unsigned long s_flags; /* status flags, see above */
int dma; /* can be PCI_DMA_TODEVICE,
PCI_DMA_FROMDEVICE or
PCI_DMA_NONE */
u64 dma_pts;
wait_queue_head_t waitq;
/* Buffer Stats */
u32 buffers;
u32 buf_size;
u32 buffers_stolen;
/* Buffer Queues */
struct cx18_queue q_free; /* free buffers */
struct cx18_queue q_full; /* full buffers */
struct cx18_queue q_io; /* waiting for I/O */
/* DVB / Digital Transport */
struct cx18_dvb dvb;
};
struct cx18_open_id {
u32 open_id;
int type;
enum v4l2_priority prio;
struct cx18 *cx;
};
/* forward declaration of struct defined in cx18-cards.h */
struct cx18_card;
#define CX18_VBI_FRAMES 32
/* VBI data */
struct vbi_info {
u32 enc_size;
u32 frame;
u8 cc_data_odd[256];
u8 cc_data_even[256];
int cc_pos;
u8 cc_no_update;
u8 vps[5];
u8 vps_found;
int wss;
u8 wss_found;
u8 wss_no_update;
u32 raw_decoder_line_size;
u8 raw_decoder_sav_odd_field;
u8 raw_decoder_sav_even_field;
u32 sliced_decoder_line_size;
u8 sliced_decoder_sav_odd_field;
u8 sliced_decoder_sav_even_field;
struct v4l2_format in;
/* convenience pointer to sliced struct in vbi_in union */
struct v4l2_sliced_vbi_format *sliced_in;
u32 service_set_in;
int insert_mpeg;
/* Buffer for the maximum of 2 * 18 * packet_size sliced VBI lines.
One for /dev/vbi0 and one for /dev/vbi8 */
struct v4l2_sliced_vbi_data sliced_data[36];
/* Buffer for VBI data inserted into MPEG stream.
The first byte is a dummy byte that's never used.
The next 16 bytes contain the MPEG header for the VBI data,
the remainder is the actual VBI data.
The max size accepted by the MPEG VBI reinsertion turns out
to be 1552 bytes, which happens to be 4 + (1 + 42) * (2 * 18) bytes,
where 4 is a four byte header, 42 is the max sliced VBI payload, 1 is
a single line header byte and 2 * 18 is the number of VBI lines per frame.
However, it seems that the data must be 1K aligned, so we have to
pad the data until the 1 or 2 K boundary.
This pointer array will allocate 2049 bytes to store each VBI frame. */
u8 *sliced_mpeg_data[CX18_VBI_FRAMES];
u32 sliced_mpeg_size[CX18_VBI_FRAMES];
struct cx18_buffer sliced_mpeg_buf;
u32 inserted_frame;
u32 start[2], count;
u32 raw_size;
u32 sliced_size;
};
/* Per cx23418, per I2C bus private algo callback data */
struct cx18_i2c_algo_callback_data {
struct cx18 *cx;
int bus_index; /* 0 or 1 for the cx23418's 1st or 2nd I2C bus */
};
/* Struct to hold info about cx18 cards */
struct cx18 {
int num; /* board number, -1 during init! */
char name[8]; /* board name for printk and interrupts (e.g. 'cx180') */
struct pci_dev *dev; /* PCI device */
const struct cx18_card *card; /* card information */
const char *card_name; /* full name of the card */
const struct cx18_card_tuner_i2c *card_i2c; /* i2c addresses to probe for tuner */
u8 is_50hz;
u8 is_60hz;
u8 is_out_50hz;
u8 is_out_60hz;
u8 nof_inputs; /* number of video inputs */
u8 nof_audio_inputs; /* number of audio inputs */
u16 buffer_id; /* buffer ID counter */
u32 v4l2_cap; /* V4L2 capabilities of card */
u32 hw_flags; /* Hardware description of the board */
unsigned mdl_offset;
struct cx18_scb *scb; /* pointer to SCB */
struct cx18_av_state av_state;
/* codec settings */
struct cx2341x_mpeg_params params;
u32 filter_mode;
u32 temporal_strength;
u32 spatial_strength;
/* dualwatch */
unsigned long dualwatch_jiffies;
u16 dualwatch_stereo_mode;
/* Digitizer type */
int digitizer; /* 0x00EF = saa7114 0x00FO = saa7115 0x0106 = mic */
struct mutex serialize_lock; /* mutex used to serialize open/close/start/stop/ioctl operations */
struct cx18_options options; /* User options */
int stream_buf_size[CX18_MAX_STREAMS]; /* Stream buffer size */
struct cx18_stream streams[CX18_MAX_STREAMS]; /* Stream data */
unsigned long i_flags; /* global cx18 flags */
atomic_t capturing; /* count number of active capture streams */
spinlock_t lock; /* lock access to this struct */
int search_pack_header;
spinlock_t dma_reg_lock; /* lock access to DMA engine registers */
int open_id; /* incremented each time an open occurs, used as
unique ID. Starts at 1, so 0 can be used as
uninitialized value in the stream->id. */
u32 base_addr;
struct v4l2_prio_state prio;
u8 card_rev;
void __iomem *enc_mem, *reg_mem;
struct vbi_info vbi;
u32 pgm_info_offset;
u32 pgm_info_num;
u32 pgm_info_write_idx;
u32 pgm_info_read_idx;
struct v4l2_enc_idx_entry pgm_info[CX18_MAX_PGM_INDEX];
u64 mpg_data_received;
u64 vbi_data_inserted;
wait_queue_head_t mb_apu_waitq;
wait_queue_head_t mb_cpu_waitq;
wait_queue_head_t mb_epu_waitq;
wait_queue_head_t mb_hpu_waitq;
wait_queue_head_t cap_w;
/* when the current DMA is finished this queue is woken up */
wait_queue_head_t dma_waitq;
/* i2c */
struct i2c_adapter i2c_adap[2];
struct i2c_algo_bit_data i2c_algo[2];
struct cx18_i2c_algo_callback_data i2c_algo_cb_data[2];
struct i2c_client i2c_client[2];
struct mutex i2c_bus_lock[2];
struct i2c_client *i2c_clients[I2C_CLIENTS_MAX];
/* v4l2 and User settings */
/* codec settings */
u32 audio_input;
u32 active_input;
u32 active_output;
v4l2_std_id std;
v4l2_std_id tuner_std; /* The norm of the tuner (fixed) */
};
/* Globals */
extern struct cx18 *cx18_cards[];
extern int cx18_cards_active;
extern int cx18_first_minor;
extern spinlock_t cx18_cards_lock;
/*==============Prototypes==================*/
/* Return non-zero if a signal is pending */
int cx18_msleep_timeout(unsigned int msecs, int intr);
/* Wait on queue, returns -EINTR if interrupted */
int cx18_waitq(wait_queue_head_t *waitq);
/* Read Hauppauge eeprom */
struct tveeprom; /* forward reference */
void cx18_read_eeprom(struct cx18 *cx, struct tveeprom *tv);
/* First-open initialization: load firmware, etc. */
int cx18_init_on_first_open(struct cx18 *cx);
/* This is a PCI post thing, where if the pci register is not read, then
the write doesn't always take effect right away. By reading back the
register any pending PCI writes will be performed (in order), and so
you can be sure that the writes are guaranteed to be done.
Rarely needed, only in some timing sensitive cases.
Apparently if this is not done some motherboards seem
to kill the firmware and get into the broken state until computer is
rebooted. */
#define write_sync(val, reg) \
do { writel(val, reg); readl(reg); } while (0)
#define read_reg(reg) readl(cx->reg_mem + (reg))
#define write_reg(val, reg) writel(val, cx->reg_mem + (reg))
#define write_reg_sync(val, reg) \
do { write_reg(val, reg); read_reg(reg); } while (0)
#define read_enc(addr) readl(cx->enc_mem + (u32)(addr))
#define write_enc(val, addr) writel(val, cx->enc_mem + (u32)(addr))
#define write_enc_sync(val, addr) \
do { write_enc(val, addr); read_enc(addr); } while (0)
#define sw1_irq_enable(val) do { \
write_reg(val, SW1_INT_STATUS); \
write_reg(read_reg(SW1_INT_ENABLE_PCI) | (val), SW1_INT_ENABLE_PCI); \
} while (0)
#define sw1_irq_disable(val) \
write_reg(read_reg(SW1_INT_ENABLE_PCI) & ~(val), SW1_INT_ENABLE_PCI);
#define sw2_irq_enable(val) do { \
write_reg(val, SW2_INT_STATUS); \
write_reg(read_reg(SW2_INT_ENABLE_PCI) | (val), SW2_INT_ENABLE_PCI); \
} while (0)
#define sw2_irq_disable(val) \
write_reg(read_reg(SW2_INT_ENABLE_PCI) & ~(val), SW2_INT_ENABLE_PCI);
#define setup_page(addr) do { \
u32 val = read_reg(0xD000F8) & ~0x1f00; \
write_reg(val | (((addr) >> 17) & 0x1f00), 0xD000F8); \
} while (0)
#endif /* CX18_DRIVER_H */
/*
* cx18 functions for DVB support
*
* Copyright (c) 2008 Steven Toth <stoth@hauppauge.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
*
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include "cx18-version.h"
#include "cx18-dvb.h"
#include "cx18-streams.h"
#include "cx18-cards.h"
#include "s5h1409.h"
/* Wait until the MXL500X driver is merged */
#ifdef HAVE_MXL500X
#include "mxl500x.h"
#endif
DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
#define CX18_REG_DMUX_NUM_PORT_0_CONTROL 0xd5a000
#ifdef HAVE_MXL500X
static struct mxl500x_config hauppauge_hvr1600_tuner = {
.delsys = MXL500x_MODE_ATSC,
.octf = MXL500x_OCTF_CH,
.xtal_freq = 16000000,
.iflo_freq = 5380000,
.ref_freq = 322800000,
.rssi_ena = MXL_RSSI_ENABLE,
.addr = 0xC6 >> 1,
};
static struct s5h1409_config hauppauge_hvr1600_config = {
.demod_address = 0x32 >> 1,
.output_mode = S5H1409_SERIAL_OUTPUT,
.gpio = S5H1409_GPIO_ON,
.qam_if = 44000,
.inversion = S5H1409_INVERSION_OFF,
.status_mode = S5H1409_DEMODLOCKING,
.mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK
};
#endif
static int dvb_register(struct cx18_stream *stream);
/* Kernel DVB framework calls this when the feed needs to start.
* The CX18 framework should enable the transport DMA handling
* and queue processing.
*/
static int cx18_dvb_start_feed(struct dvb_demux_feed *feed)
{
struct dvb_demux *demux = feed->demux;
struct cx18_stream *stream = (struct cx18_stream *) demux->priv;
struct cx18 *cx = stream->cx;
int ret = -EINVAL;
u32 v;
CX18_DEBUG_INFO("Start feed: pid = 0x%x index = %d\n",
feed->pid, feed->index);
switch (cx->card->type) {
case CX18_CARD_HVR_1600_ESMT:
case CX18_CARD_HVR_1600_SAMSUNG:
v = read_reg(CX18_REG_DMUX_NUM_PORT_0_CONTROL);
v |= 0x00400000; /* Serial Mode */
v |= 0x00002000; /* Data Length - Byte */
v |= 0x00010000; /* Error - Polarity */
v |= 0x00020000; /* Error - Passthru */
v |= 0x000c0000; /* Error - Ignore */
write_reg(v, CX18_REG_DMUX_NUM_PORT_0_CONTROL);
break;
default:
/* Assumption - Parallel transport - Signalling
* undefined or default.
*/
break;
}
if (!demux->dmx.frontend)
return -EINVAL;
if (stream) {
mutex_lock(&stream->dvb.feedlock);
if (stream->dvb.feeding++ == 0) {
CX18_DEBUG_INFO("Starting Transport DMA\n");
ret = cx18_start_v4l2_encode_stream(stream);
} else
ret = 0;
mutex_unlock(&stream->dvb.feedlock);
}
return ret;
}
/* Kernel DVB framework calls this when the feed needs to stop. */
static int cx18_dvb_stop_feed(struct dvb_demux_feed *feed)
{
struct dvb_demux *demux = feed->demux;
struct cx18_stream *stream = (struct cx18_stream *)demux->priv;
struct cx18 *cx = stream->cx;
int ret = -EINVAL;
CX18_DEBUG_INFO("Stop feed: pid = 0x%x index = %d\n",
feed->pid, feed->index);
if (stream) {
mutex_lock(&stream->dvb.feedlock);
if (--stream->dvb.feeding == 0) {
CX18_DEBUG_INFO("Stopping Transport DMA\n");
ret = cx18_stop_v4l2_encode_stream(stream, 0);
} else
ret = 0;
mutex_unlock(&stream->dvb.feedlock);
}
return ret;
}
int cx18_dvb_register(struct cx18_stream *stream)
{
struct cx18 *cx = stream->cx;
struct cx18_dvb *dvb = &stream->dvb;
struct dvb_adapter *dvb_adapter;
struct dvb_demux *dvbdemux;
struct dmx_demux *dmx;
int ret;
if (!dvb)
return -EINVAL;
ret = dvb_register_adapter(&dvb->dvb_adapter,
CX18_DRIVER_NAME,
THIS_MODULE, &cx->dev->dev, adapter_nr);
if (ret < 0)
goto err_out;
dvb_adapter = &dvb->dvb_adapter;
dvbdemux = &dvb->demux;
dvbdemux->priv = (void *)stream;
dvbdemux->filternum = 256;
dvbdemux->feednum = 256;
dvbdemux->start_feed = cx18_dvb_start_feed;
dvbdemux->stop_feed = cx18_dvb_stop_feed;
dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING);
ret = dvb_dmx_init(dvbdemux);
if (ret < 0)
goto err_dvb_unregister_adapter;
dmx = &dvbdemux->dmx;
dvb->hw_frontend.source = DMX_FRONTEND_0;
dvb->mem_frontend.source = DMX_MEMORY_FE;
dvb->dmxdev.filternum = 256;
dvb->dmxdev.demux = dmx;
ret = dvb_dmxdev_init(&dvb->dmxdev, dvb_adapter);
if (ret < 0)
goto err_dvb_dmx_release;
ret = dmx->add_frontend(dmx, &dvb->hw_frontend);
if (ret < 0)
goto err_dvb_dmxdev_release;
ret = dmx->add_frontend(dmx, &dvb->mem_frontend);
if (ret < 0)
goto err_remove_hw_frontend;
ret = dmx->connect_frontend(dmx, &dvb->hw_frontend);
if (ret < 0)
goto err_remove_mem_frontend;
ret = dvb_register(stream);
if (ret < 0)
goto err_disconnect_frontend;
dvb_net_init(dvb_adapter, &dvb->dvbnet, dmx);
CX18_INFO("DVB Frontend registered\n");
mutex_init(&dvb->feedlock);
dvb->enabled = 1;
return ret;
err_disconnect_frontend:
dmx->disconnect_frontend(dmx);
err_remove_mem_frontend:
dmx->remove_frontend(dmx, &dvb->mem_frontend);
err_remove_hw_frontend:
dmx->remove_frontend(dmx, &dvb->hw_frontend);
err_dvb_dmxdev_release:
dvb_dmxdev_release(&dvb->dmxdev);
err_dvb_dmx_release:
dvb_dmx_release(dvbdemux);
err_dvb_unregister_adapter:
dvb_unregister_adapter(dvb_adapter);
err_out:
return ret;
}
void cx18_dvb_unregister(struct cx18_stream *stream)
{
struct cx18 *cx = stream->cx;
struct cx18_dvb *dvb = &stream->dvb;
struct dvb_adapter *dvb_adapter;
struct dvb_demux *dvbdemux;
struct dmx_demux *dmx;
CX18_INFO("unregister DVB\n");
dvb_adapter = &dvb->dvb_adapter;
dvbdemux = &dvb->demux;
dmx = &dvbdemux->dmx;
dmx->close(dmx);
dvb_net_release(&dvb->dvbnet);
dmx->remove_frontend(dmx, &dvb->mem_frontend);
dmx->remove_frontend(dmx, &dvb->hw_frontend);
dvb_dmxdev_release(&dvb->dmxdev);
dvb_dmx_release(dvbdemux);
dvb_unregister_frontend(dvb->fe);
dvb_frontend_detach(dvb->fe);
dvb_unregister_adapter(dvb_adapter);
}
/* All the DVB attach calls go here, this function get's modified
* for each new card. No other function in this file needs
* to change.
*/
static int dvb_register(struct cx18_stream *stream)
{
struct cx18_dvb *dvb = &stream->dvb;
struct cx18 *cx = stream->cx;
int ret = 0;
switch (cx->card->type) {
/* Wait until the MXL500X driver is merged */
#ifdef HAVE_MXL500X
case CX18_CARD_HVR_1600_ESMT:
case CX18_CARD_HVR_1600_SAMSUNG:
dvb->fe = dvb_attach(s5h1409_attach,
&hauppauge_hvr1600_config,
&cx->i2c_adap[0]);
if (dvb->fe != NULL) {
dvb_attach(mxl500x_attach, dvb->fe,
&hauppauge_hvr1600_tuner,
&cx->i2c_adap[0]);
ret = 0;
}
break;
#endif
default:
/* No Digital Tv Support */
break;
}
if (dvb->fe == NULL) {
CX18_ERR("frontend initialization failed\n");
return -1;
}
ret = dvb_register_frontend(&dvb->dvb_adapter, dvb->fe);
if (ret < 0) {
if (dvb->fe->ops.release)
dvb->fe->ops.release(dvb->fe);
return ret;
}
return ret;
}
/*
* cx18 functions for DVB support
*
* Copyright (c) 2008 Steven Toth <stoth@hauppauge.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
*
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include "cx18-driver.h"
int cx18_dvb_register(struct cx18_stream *stream);
void cx18_dvb_unregister(struct cx18_stream *stream);
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/*
* cx18 file operation functions
*
* Derived from ivtv-fileops.h
*
* Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
* 02111-1307 USA
*/
/* Testing/Debugging */
int cx18_v4l2_open(struct inode *inode, struct file *filp);
ssize_t cx18_v4l2_read(struct file *filp, char __user *buf, size_t count,
loff_t *pos);
ssize_t cx18_v4l2_write(struct file *filp, const char __user *buf, size_t count,
loff_t *pos);
int cx18_v4l2_close(struct inode *inode, struct file *filp);
unsigned int cx18_v4l2_enc_poll(struct file *filp, poll_table *wait);
int cx18_start_capture(struct cx18_open_id *id);
void cx18_stop_capture(struct cx18_open_id *id, int gop_end);
void cx18_mute(struct cx18 *cx);
void cx18_unmute(struct cx18 *cx);
/* Utilities */
/* Try to claim a stream for the filehandle. Return 0 on success,
-EBUSY if stream already claimed. Once a stream is claimed, it
remains claimed until the associated filehandle is closed. */
int cx18_claim_stream(struct cx18_open_id *id, int type);
/* Release a previously claimed stream. */
void cx18_release_stream(struct cx18_stream *s);
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/*
* cx18 firmware functions
*
* Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
* 02111-1307 USA
*/
int cx18_firmware_init(struct cx18 *cx);
void cx18_halt_firmware(struct cx18 *cx);
void cx18_init_memory(struct cx18 *cx);
void cx18_init_power(struct cx18 *cx, int lowpwr);
/*
* cx18 gpio functions
*
* Derived from ivtv-gpio.c
*
* Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
* 02111-1307 USA
*/
#include "cx18-driver.h"
#include "cx18-cards.h"
#include "cx18-gpio.h"
#include "tuner-xc2028.h"
/********************* GPIO stuffs *********************/
/* GPIO registers */
#define CX18_REG_GPIO_IN 0xc72010
#define CX18_REG_GPIO_OUT1 0xc78100
#define CX18_REG_GPIO_DIR1 0xc78108
#define CX18_REG_GPIO_OUT2 0xc78104
#define CX18_REG_GPIO_DIR2 0xc7810c
/*
* HVR-1600 GPIO pins, courtesy of Hauppauge:
*
* gpio0: zilog ir process reset pin
* gpio1: zilog programming pin (you should never use this)
* gpio12: cx24227 reset pin
* gpio13: cs5345 reset pin
*/
void cx18_gpio_init(struct cx18 *cx)
{
if (cx->card->gpio_init.direction == 0)
return;
CX18_DEBUG_INFO("GPIO initial dir: %08x out: %08x\n",
read_reg(CX18_REG_GPIO_DIR1), read_reg(CX18_REG_GPIO_OUT1));
/* init output data then direction */
write_reg(cx->card->gpio_init.direction << 16, CX18_REG_GPIO_DIR1);
write_reg(0, CX18_REG_GPIO_DIR2);
write_reg((cx->card->gpio_init.direction << 16) |
cx->card->gpio_init.initial_value, CX18_REG_GPIO_OUT1);
write_reg(0, CX18_REG_GPIO_OUT2);
}
/* Xceive tuner reset function */
int cx18_reset_tuner_gpio(void *dev, int cmd, int value)
{
struct i2c_algo_bit_data *algo = dev;
struct cx18 *cx = algo->data;
/* int curdir, curout;*/
if (cmd != XC2028_TUNER_RESET)
return 0;
CX18_DEBUG_INFO("Resetting tuner\n");
return 0;
}
/*
* cx18 gpio functions
*
* Derived from ivtv-gpio.h
*
* Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
void cx18_gpio_init(struct cx18 *cx);
int cx18_reset_tuner_gpio(void *dev, int cmd, int value);
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