x86/fpu: Add size and mask information to fpstate
mainline inclusion from mainline-v5.16-rc1 commit 248452ce category: feature bugzilla: https://gitee.com/openeuler/intel-kernel/issues/I590ZC CVE: NA Intel-SIG: commit 248452ce x86/fpu: Add size and mask information to fpstate. -------------------------------- Add state size and feature mask information to the fpstate container. This will be used for runtime checks with the upcoming support for dynamically enabled features and dynamically sized buffers. That avoids conditionals all over the place as the required information is accessible for both default and extended buffers. Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NBorislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20211013145322.921388806@linutronix.deSigned-off-by: NLin Wang <lin.x.wang@intel.com> Signed-off-by: NAichun Shi <aichun.shi@intel.com>
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