drm/nouveau/gpuobj: create wrapper functions for mapping gpuobj into vm/bar

Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

drivers/gpu/drm/nouveau/core/engine/fifo/nvc0.c

@@ -422,7 +422,7 @@ nvc0_fifo_destroy(struct drm_device *dev, int engine)
 	struct nvc0_fifo_priv *priv = nv_engine(dev, NVOBJ_ENGINE_FIFO);
 	struct drm_nouveau_private *dev_priv = dev->dev_private;
 
-	nouveau_vm_put(&priv->user.bar);
+	nouveau_gpuobj_unmap(&priv->user.bar);
 	nouveau_gpuobj_ref(NULL, &priv->user.mem);
 
 	nouveau_gpuobj_ref(NULL, &priv->playlist[1]);
@@ -464,13 +464,11 @@ nvc0_fifo_create(struct drm_device *dev)
 	if (ret)
 		goto error;
 
-	ret = nouveau_vm_get(dev_priv->bar1_vm, priv->user.mem->size,
-			     12, NV_MEM_ACCESS_RW, &priv->user.bar);
+	ret = nouveau_gpuobj_map_bar(priv->user.mem, NV_MEM_ACCESS_RW,
+				    &priv->user.bar);
 	if (ret)
 		goto error;
 
-	nouveau_vm_map(&priv->user.bar, *(struct nouveau_mem **)priv->user.mem->node);
-
 	nouveau_irq_register(dev, 8, nvc0_fifo_isr);
 error:
 	if (ret)

drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c

@@ -402,7 +402,7 @@ nve0_fifo_destroy(struct drm_device *dev, int engine)
 	struct nve0_fifo_priv *priv = nv_engine(dev, engine);
 	int i;
 
-	nouveau_vm_put(&priv->user.bar);
+	nouveau_gpuobj_unmap(&priv->user.bar);
 	nouveau_gpuobj_ref(NULL, &priv->user.mem);
 
 	for (i = 0; i < NVE0_FIFO_ENGINE_NUM; i++) {
@@ -438,13 +438,11 @@ nve0_fifo_create(struct drm_device *dev)
 	if (ret)
 		goto error;
 
-	ret = nouveau_vm_get(dev_priv->bar1_vm, priv->user.mem->size,
-			     12, NV_MEM_ACCESS_RW, &priv->user.bar);
+	ret = nouveau_gpuobj_map_bar(priv->user.mem, NV_MEM_ACCESS_RW,
+				    &priv->user.bar);
 	if (ret)
 		goto error;
 
-	nouveau_vm_map(&priv->user.bar, *(struct nouveau_mem **)priv->user.mem->node);
-
 	nouveau_irq_register(dev, 8, nve0_fifo_isr);
 error:
 	if (ret)

drivers/gpu/drm/nouveau/nouveau_drv.h

@@ -879,6 +879,13 @@ extern void nv50_gpuobj_dma_init(struct nouveau_gpuobj *, u32 offset,
 				 int class, u64 base, u64 size, int target,
 				 int access, u32 type, u32 comp);
 
+
+int  nouveau_gpuobj_map_vm(struct nouveau_gpuobj *gpuobj, u32 flags,
+			   struct nouveau_vm *vm, struct nouveau_vma *vma);
+int  nouveau_gpuobj_map_bar(struct nouveau_gpuobj *gpuobj, u32 flags,
+			    struct nouveau_vma *vma);
+void nouveau_gpuobj_unmap(struct nouveau_vma *vma);
+
 /* nouveau_irq.c */
 extern int         nouveau_irq_init(struct drm_device *);
 extern void        nouveau_irq_fini(struct drm_device *);

drivers/gpu/drm/nouveau/nouveau_gpuobj.c

@@ -806,3 +806,34 @@ nv_wo32(struct nouveau_gpuobj *gpuobj, u32 offset, u32 val)
 
 	nv_wi32(dev, gpuobj->pinst + offset, val);
 }
+
+int
+nouveau_gpuobj_map_vm(struct nouveau_gpuobj *gpuobj, u32 flags,
+		      struct nouveau_vm *vm, struct nouveau_vma *vma)
+{
+	struct nouveau_mem **mem = gpuobj->node;
+	struct nouveau_mem *node = *mem;
+	int ret;
+
+	ret = nouveau_vm_get(vm, node->size << 12, 12, flags, vma);
+	if (ret)
+		return ret;
+
+	nouveau_vm_map(vma, node);
+	return 0;
+}
+
+int
+nouveau_gpuobj_map_bar(struct nouveau_gpuobj *gpuobj, u32 flags,
+		       struct nouveau_vma *vma)
+{
+	struct drm_nouveau_private *dev_priv = gpuobj->dev->dev_private;
+	return nouveau_gpuobj_map_vm(gpuobj, flags, dev_priv->bar1_vm, vma);
+}
+
+void
+nouveau_gpuobj_unmap(struct nouveau_vma *vma)
+{
+	nouveau_vm_unmap(vma);
+	nouveau_vm_put(vma);
+}