提交 17822356 编写于 作者: G Guangbin Huang 提交者: Zheng Zengkai

net: hns3: replace macro of max qset number with specification

mainline inclusion
from mainline-v5.12-rc1-dontuse
commit 3f094bd1
category: feature
bugzilla: 173966
CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=3f094bd11a3720d2a00e9b6dfc53f1ab25884a49

----------------------------------------------------------------------

The max qset number is a fixed value now and it is defined by a macro.
In order to support other value in different kinds of device, it is
better to use specification queried from firmware to replace macro.
Signed-off-by: NGuangbin Huang <huangguangbin2@huawei.com>
Signed-off-by: NHuazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: NJakub Kicinski <kuba@kernel.org>
Reviewed-by: NYongxin Li <liyongxin1@huawei.com>
Signed-off-by: NJunxin Chen <chenjunxin1@huawei.com>
Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
上级 deb96347
...@@ -284,6 +284,7 @@ struct hnae3_dev_specs { ...@@ -284,6 +284,7 @@ struct hnae3_dev_specs {
u16 max_int_gl; /* max value of interrupt coalesce based on INT_GL */ u16 max_int_gl; /* max value of interrupt coalesce based on INT_GL */
u8 max_non_tso_bd_num; /* max BD number of one non-TSO packet */ u8 max_non_tso_bd_num; /* max BD number of one non-TSO packet */
u16 max_frm_size; u16 max_frm_size;
u16 max_qset_num;
}; };
struct hnae3_client_ops { struct hnae3_client_ops {
......
...@@ -391,6 +391,7 @@ static void hns3_dbg_dev_specs(struct hnae3_handle *h) ...@@ -391,6 +391,7 @@ static void hns3_dbg_dev_specs(struct hnae3_handle *h)
dev_info(priv->dev, "MAX INT GL: %u\n", dev_specs->max_int_gl); dev_info(priv->dev, "MAX INT GL: %u\n", dev_specs->max_int_gl);
dev_info(priv->dev, "MAX frame size: %u\n", dev_specs->max_frm_size); dev_info(priv->dev, "MAX frame size: %u\n", dev_specs->max_frm_size);
dev_info(priv->dev, "MAX TM RATE: %uMbps\n", dev_specs->max_tm_rate); dev_info(priv->dev, "MAX TM RATE: %uMbps\n", dev_specs->max_tm_rate);
dev_info(priv->dev, "MAX QSET number: %u\n", dev_specs->max_qset_num);
} }
static ssize_t hns3_dbg_cmd_read(struct file *filp, char __user *buffer, static ssize_t hns3_dbg_cmd_read(struct file *filp, char __user *buffer,
......
...@@ -1132,7 +1132,7 @@ struct hclge_dev_specs_0_cmd { ...@@ -1132,7 +1132,7 @@ struct hclge_dev_specs_0_cmd {
struct hclge_dev_specs_1_cmd { struct hclge_dev_specs_1_cmd {
__le16 max_frm_size; __le16 max_frm_size;
__le16 rsv0; __le16 max_qset_num;
__le16 max_int_gl; __le16 max_int_gl;
u8 rsv1[18]; u8 rsv1[18];
}; };
......
...@@ -1599,8 +1599,6 @@ static void hclge_dbg_dump_qs_shaper_all(struct hclge_dev *hdev) ...@@ -1599,8 +1599,6 @@ static void hclge_dbg_dump_qs_shaper_all(struct hclge_dev *hdev)
static void hclge_dbg_dump_qs_shaper(struct hclge_dev *hdev, static void hclge_dbg_dump_qs_shaper(struct hclge_dev *hdev,
const char *cmd_buf) const char *cmd_buf)
{ {
#define HCLGE_MAX_QSET_NUM 1024
u16 qsid; u16 qsid;
int ret; int ret;
...@@ -1610,9 +1608,9 @@ static void hclge_dbg_dump_qs_shaper(struct hclge_dev *hdev, ...@@ -1610,9 +1608,9 @@ static void hclge_dbg_dump_qs_shaper(struct hclge_dev *hdev,
return; return;
} }
if (qsid >= HCLGE_MAX_QSET_NUM) { if (qsid >= hdev->ae_dev->dev_specs.max_qset_num) {
dev_err(&hdev->pdev->dev, "qsid(%u) out of range[0-1023]\n", dev_err(&hdev->pdev->dev, "qsid(%u) out of range[0-%u]\n",
qsid); qsid, hdev->ae_dev->dev_specs.max_qset_num - 1);
return; return;
} }
......
...@@ -1372,6 +1372,7 @@ static void hclge_set_default_dev_specs(struct hclge_dev *hdev) ...@@ -1372,6 +1372,7 @@ static void hclge_set_default_dev_specs(struct hclge_dev *hdev)
ae_dev->dev_specs.max_tm_rate = HCLGE_ETHER_MAX_RATE; ae_dev->dev_specs.max_tm_rate = HCLGE_ETHER_MAX_RATE;
ae_dev->dev_specs.max_int_gl = HCLGE_DEF_MAX_INT_GL; ae_dev->dev_specs.max_int_gl = HCLGE_DEF_MAX_INT_GL;
ae_dev->dev_specs.max_frm_size = HCLGE_MAC_MAX_FRAME; ae_dev->dev_specs.max_frm_size = HCLGE_MAC_MAX_FRAME;
ae_dev->dev_specs.max_qset_num = HCLGE_MAX_QSET_NUM;
} }
static void hclge_parse_dev_specs(struct hclge_dev *hdev, static void hclge_parse_dev_specs(struct hclge_dev *hdev,
...@@ -1390,6 +1391,7 @@ static void hclge_parse_dev_specs(struct hclge_dev *hdev, ...@@ -1390,6 +1391,7 @@ static void hclge_parse_dev_specs(struct hclge_dev *hdev,
ae_dev->dev_specs.int_ql_max = le16_to_cpu(req0->int_ql_max); ae_dev->dev_specs.int_ql_max = le16_to_cpu(req0->int_ql_max);
ae_dev->dev_specs.rss_key_size = le16_to_cpu(req0->rss_key_size); ae_dev->dev_specs.rss_key_size = le16_to_cpu(req0->rss_key_size);
ae_dev->dev_specs.max_tm_rate = le32_to_cpu(req0->max_tm_rate); ae_dev->dev_specs.max_tm_rate = le32_to_cpu(req0->max_tm_rate);
ae_dev->dev_specs.max_qset_num = le16_to_cpu(req1->max_qset_num);
ae_dev->dev_specs.max_int_gl = le16_to_cpu(req1->max_int_gl); ae_dev->dev_specs.max_int_gl = le16_to_cpu(req1->max_int_gl);
ae_dev->dev_specs.max_frm_size = le16_to_cpu(req1->max_frm_size); ae_dev->dev_specs.max_frm_size = le16_to_cpu(req1->max_frm_size);
} }
...@@ -1406,6 +1408,8 @@ static void hclge_check_dev_specs(struct hclge_dev *hdev) ...@@ -1406,6 +1408,8 @@ static void hclge_check_dev_specs(struct hclge_dev *hdev)
dev_specs->rss_key_size = HCLGE_RSS_KEY_SIZE; dev_specs->rss_key_size = HCLGE_RSS_KEY_SIZE;
if (!dev_specs->max_tm_rate) if (!dev_specs->max_tm_rate)
dev_specs->max_tm_rate = HCLGE_ETHER_MAX_RATE; dev_specs->max_tm_rate = HCLGE_ETHER_MAX_RATE;
if (!dev_specs->max_qset_num)
dev_specs->max_qset_num = HCLGE_MAX_QSET_NUM;
if (!dev_specs->max_int_gl) if (!dev_specs->max_int_gl)
dev_specs->max_int_gl = HCLGE_DEF_MAX_INT_GL; dev_specs->max_int_gl = HCLGE_DEF_MAX_INT_GL;
if (!dev_specs->max_frm_size) if (!dev_specs->max_frm_size)
......
...@@ -148,6 +148,8 @@ ...@@ -148,6 +148,8 @@
/* Factor used to calculate offset and bitmap of VF num */ /* Factor used to calculate offset and bitmap of VF num */
#define HCLGE_VF_NUM_PER_CMD 64 #define HCLGE_VF_NUM_PER_CMD 64
#define HCLGE_MAX_QSET_NUM 1024
enum HLCGE_PORT_TYPE { enum HLCGE_PORT_TYPE {
HOST_PORT, HOST_PORT,
NETWORK_PORT NETWORK_PORT
......
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