提交 153dccd4 编写于 作者: R Rajkumar Manoharan 提交者: John W. Linville

ath9k_hw: fix power state for MCI

Program MCI related power registers only if MCI interrupts
are enabled. This could help to reduce power consumptions when
WLAN alone is enabled in BT coex chips.
Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
上级 c9ae6ab4
...@@ -2009,12 +2009,9 @@ static void ath9k_set_power_sleep(struct ath_hw *ah) ...@@ -2009,12 +2009,9 @@ static void ath9k_set_power_sleep(struct ath_hw *ah)
REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV); REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
if (AR_SREV_9462(ah)) { if (AR_SREV_9462(ah)) {
REG_WRITE(ah, AR_TIMER_MODE, REG_CLR_BIT(ah, AR_TIMER_MODE, 0xff);
REG_READ(ah, AR_TIMER_MODE) & 0xFFFFFF00); REG_CLR_BIT(ah, AR_NDP2_TIMER_MODE, 0xff);
REG_WRITE(ah, AR_NDP2_TIMER_MODE, REG_CLR_BIT(ah, AR_SLP32_INC, 0xfffff);
REG_READ(ah, AR_NDP2_TIMER_MODE) & 0xFFFFFF00);
REG_WRITE(ah, AR_SLP32_INC,
REG_READ(ah, AR_SLP32_INC) & 0xFFF00000);
/* xxx Required for WLAN only case ? */ /* xxx Required for WLAN only case ? */
REG_WRITE(ah, AR_MCI_INTERRUPT_RX_MSG_EN, 0); REG_WRITE(ah, AR_MCI_INTERRUPT_RX_MSG_EN, 0);
udelay(100); udelay(100);
...@@ -2026,7 +2023,7 @@ static void ath9k_set_power_sleep(struct ath_hw *ah) ...@@ -2026,7 +2023,7 @@ static void ath9k_set_power_sleep(struct ath_hw *ah)
*/ */
REG_CLR_BIT(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_EN); REG_CLR_BIT(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_EN);
if (AR_SREV_9462(ah)) if (ath9k_hw_mci_is_enabled(ah))
udelay(100); udelay(100);
if (!AR_SREV_9100(ah) && !AR_SREV_9300_20_OR_LATER(ah)) if (!AR_SREV_9100(ah) && !AR_SREV_9300_20_OR_LATER(ah))
...@@ -2051,7 +2048,6 @@ static void ath9k_set_power_sleep(struct ath_hw *ah) ...@@ -2051,7 +2048,6 @@ static void ath9k_set_power_sleep(struct ath_hw *ah)
static void ath9k_set_power_network_sleep(struct ath_hw *ah) static void ath9k_set_power_network_sleep(struct ath_hw *ah)
{ {
struct ath9k_hw_capabilities *pCap = &ah->caps; struct ath9k_hw_capabilities *pCap = &ah->caps;
u32 val;
REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV); REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
...@@ -2070,19 +2066,16 @@ static void ath9k_set_power_network_sleep(struct ath_hw *ah) ...@@ -2070,19 +2066,16 @@ static void ath9k_set_power_network_sleep(struct ath_hw *ah)
* SYS_WAKING and SYS_SLEEPING messages which will make * SYS_WAKING and SYS_SLEEPING messages which will make
* BT CPU to busy to process. * BT CPU to busy to process.
*/ */
if (AR_SREV_9462(ah)) { if (ath9k_hw_mci_is_enabled(ah))
val = REG_READ(ah, AR_MCI_INTERRUPT_RX_MSG_EN) & REG_CLR_BIT(ah, AR_MCI_INTERRUPT_RX_MSG_EN,
~AR_MCI_INTERRUPT_RX_HW_MSG_MASK; AR_MCI_INTERRUPT_RX_HW_MSG_MASK);
REG_WRITE(ah, AR_MCI_INTERRUPT_RX_MSG_EN, val);
}
/* /*
* Clear the RTC force wake bit to allow the * Clear the RTC force wake bit to allow the
* mac to go to sleep. * mac to go to sleep.
*/ */
REG_CLR_BIT(ah, AR_RTC_FORCE_WAKE, REG_CLR_BIT(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_EN);
AR_RTC_FORCE_WAKE_EN);
if (AR_SREV_9462(ah)) if (ath9k_hw_mci_is_enabled(ah))
udelay(30); udelay(30);
} }
......
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