MIPS: math-emu: Add support for the MIPS R6 SELNEZ FPU instruction

MIPS R6 introduced the following instruction:
SELNEZ.fmt: FPR[fd]  FPR[ft].bit0 ? FPR[fs] : 0

Add support for emulating the single and double precision
formats of the said instruction.
Signed-off-by: NMarkos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10955/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

arch/mips/math-emu/cp1emu.c

@@ -1754,6 +1754,17 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
 				SPFROMREG(rv.s, MIPSInst_FS(ir));
 			break;
 
+		case fselnez_op:
+			if (!cpu_has_mips_r6)
+				return SIGILL;
+
+			SPFROMREG(rv.s, MIPSInst_FT(ir));
+			if (rv.w & 0x1)
+				SPFROMREG(rv.s, MIPSInst_FS(ir));
+			else
+				rv.w = 0;
+			break;
+
 		case fabs_op:
 			handler.u = ieee754sp_abs;
 			goto scopuop;
@@ -1963,6 +1974,17 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
 				DPFROMREG(rv.d, MIPSInst_FS(ir));
 			break;
 
+		case fselnez_op:
+			if (!cpu_has_mips_r6)
+				return SIGILL;
+
+			DPFROMREG(rv.d, MIPSInst_FT(ir));
+			if (rv.l & 0x1)
+				DPFROMREG(rv.d, MIPSInst_FS(ir));
+			else
+				rv.l = 0;
+			break;
+
 		case fabs_op:
 			handler.u = ieee754dp_abs;
 			goto dcopuop;