提交 121f2a1c 编写于 作者: X Xiongfeng Wang 提交者: Zheng Zengkai

arm64: mark all the GICC nodes in MADT as possible cpu

hulk inclusion
category: feature
bugzilla: 47994
CVE: NA

-------------------------------------------------------------------------

We set 'cpu_possible_mask' based on the enabled GICC node in MADT. If
the GICC node is disabled, we will skip initializing the kernel data
structure for that CPU.

To support CPU hotplug, we need to initialize some CPU related data
structure in advance. This patch mark all the GICC nodes as possible CPU
and only these enabled GICC nodes as present CPU.
Signed-off-by: NXiongfeng Wang <wangxiongfeng2@huawei.com>
Acked-by: NHanjun Guo <guohanjun@huawei.com>
Signed-off-by: NYang Yingliang <yangyingliang@huawei.com>
Signed-off-by: NWang ShaoBo <bobo.shaobowang@huawei.com>
Signed-off-by: NXiongfeng Wang <wangxiongfeng2@huawei.com>
Reviewed-by: NHanjun Guo <guohanjun@huawei.com>
Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
上级 89be6821
...@@ -406,7 +406,7 @@ static int __init topology_init(void) ...@@ -406,7 +406,7 @@ static int __init topology_init(void)
for_each_online_node(i) for_each_online_node(i)
register_one_node(i); register_one_node(i);
for_each_possible_cpu(i) { for_each_present_cpu(i) {
struct cpu *cpu = &per_cpu(cpu_data.cpu, i); struct cpu *cpu = &per_cpu(cpu_data.cpu, i);
cpu->hotpluggable = cpu_can_disable(i); cpu->hotpluggable = cpu_can_disable(i);
register_cpu(cpu, i); register_cpu(cpu, i);
......
...@@ -549,16 +549,14 @@ acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor) ...@@ -549,16 +549,14 @@ acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor)
{ {
u64 hwid = processor->arm_mpidr; u64 hwid = processor->arm_mpidr;
if (!(processor->flags & ACPI_MADT_ENABLED)) {
pr_debug("skipping disabled CPU entry with 0x%llx MPIDR\n", hwid);
return;
}
if (hwid & ~MPIDR_HWID_BITMASK || hwid == INVALID_HWID) { if (hwid & ~MPIDR_HWID_BITMASK || hwid == INVALID_HWID) {
pr_err("skipping CPU entry with invalid MPIDR 0x%llx\n", hwid); pr_err("skipping CPU entry with invalid MPIDR 0x%llx\n", hwid);
return; return;
} }
if (!(processor->flags & ACPI_MADT_ENABLED))
pr_debug("disabled CPU entry with 0x%llx MPIDR\n", hwid);
if (is_mpidr_duplicate(cpu_count, hwid)) { if (is_mpidr_duplicate(cpu_count, hwid)) {
pr_err("duplicate CPU MPIDR 0x%llx in MADT\n", hwid); pr_err("duplicate CPU MPIDR 0x%llx in MADT\n", hwid);
return; return;
...@@ -781,7 +779,13 @@ void __init smp_prepare_cpus(unsigned int max_cpus) ...@@ -781,7 +779,13 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
if (err) if (err)
continue; continue;
set_cpu_present(cpu, true); if (acpi_disabled) {
set_cpu_present(cpu, true);
} else {
if ((cpu_madt_gicc[cpu].flags & ACPI_MADT_ENABLED))
set_cpu_present(cpu, true);
}
numa_store_cpu_info(cpu); numa_store_cpu_info(cpu);
} }
} }
......
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