i2c-algo-bit: Fix timeout test
When fetching DDC using i2c algo bit, we were often seeing timeouts before getting valid EDID on a retry. The VESA spec states 2ms is the DDC timeout, so when this translates into 1 jiffie and we are close to the end of the time period, it could return with a timeout less than 2ms. Change this code to use time_after instead of time_after_eq. Signed-off-by: NDave Airlie <airlied@redhat.com> Signed-off-by: NJean Delvare <khali@linux-fr.org>
Showing
想要评论请 注册 或 登录