drm/amd/display: get dal1.1 to run

Signed-off-by: NDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: NDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: NHarry Wentland <Harry.Wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h

@@ -275,7 +275,7 @@ struct dce_hwseq_registers {
 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
 #define HWSEQ_DCN_MASK_SH_LIST(mask_sh)\
 	HWSEQ_PIXEL_RATE_MASK_SH_LIST(mask_sh, OTG0_),\
-	HWSEQ_PHYPLL_MASK_SH_LIST(mask_sh, OTG0_),\
+	HWS_SF1(OTG0_, PHYPLL_PIXEL_RATE_CNTL, PHYPLL_PIXEL_RATE_SOURCE, mask_sh), \
 	HWS_SF(OTG0_, OTG_GLOBAL_SYNC_STATUS, VUPDATE_NO_LOCK_EVENT_CLEAR, mask_sh), \
 	HWS_SF(OTG0_, OTG_GLOBAL_SYNC_STATUS, VUPDATE_NO_LOCK_EVENT_OCCURRED, mask_sh), \
 	HWS_SF(HUBP0_, DCHUBP_CNTL, HUBP_NO_OUTSTANDING_REQ, mask_sh), \

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c

@@ -784,7 +784,7 @@ static void oppn10_program_color_matrix(struct dcn10_opp *oppn10,
 	}
 }
 
-void oppn10_set_output_csc_adjustment(
+static void oppn10_set_output_csc_adjustment(
 		struct output_pixel_processor *opp,
 		const struct out_csc_color_matrix *tbl_entry)
 {