提交 0966253d 编写于 作者: C Catalin Marinas

kvm: arm64: Convert kvm_set_s2pte_readonly() from inline asm to cmpxchg()

To take advantage of the LSE atomic instructions and also make the code
cleaner, convert the kvm_set_s2pte_readonly() function to use the more
generic cmpxchg().

Cc: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: NWill Deacon <will.deacon@arm.com>
Reviewed-by: NChristoffer Dall <christoffer.dall@linaro.org>
Acked-by: NMark Rutland <mark.rutland@arm.com>
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
上级 3bbf7157
...@@ -175,18 +175,15 @@ static inline pmd_t kvm_s2pmd_mkwrite(pmd_t pmd) ...@@ -175,18 +175,15 @@ static inline pmd_t kvm_s2pmd_mkwrite(pmd_t pmd)
static inline void kvm_set_s2pte_readonly(pte_t *pte) static inline void kvm_set_s2pte_readonly(pte_t *pte)
{ {
pteval_t pteval; pteval_t old_pteval, pteval;
unsigned long tmp;
pteval = READ_ONCE(pte_val(*pte));
asm volatile("// kvm_set_s2pte_readonly\n" do {
" prfm pstl1strm, %2\n" old_pteval = pteval;
"1: ldxr %0, %2\n" pteval &= ~PTE_S2_RDWR;
" and %0, %0, %3 // clear PTE_S2_RDWR\n" pteval |= PTE_S2_RDONLY;
" orr %0, %0, %4 // set PTE_S2_RDONLY\n" pteval = cmpxchg_relaxed(&pte_val(*pte), old_pteval, pteval);
" stxr %w1, %0, %2\n" } while (pteval != old_pteval);
" cbnz %w1, 1b\n"
: "=&r" (pteval), "=&r" (tmp), "+Q" (pte_val(*pte))
: "L" (~PTE_S2_RDWR), "L" (PTE_S2_RDONLY));
} }
static inline bool kvm_s2pte_readonly(pte_t *pte) static inline bool kvm_s2pte_readonly(pte_t *pte)
......
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