提交 07ec7ec5 编写于 作者: V Ville Syrjälä 提交者: Daniel Vetter

drm/i915: Make VLV_GUNIT_CLOCK_GATE register value more readable

Instead of 0x18xxxx use (VLV_DISPLAY_BASE + xxxx).
Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
上级 d88b2270
......@@ -554,7 +554,7 @@
#define IIR 0x020a4
#define IMR 0x020a8
#define ISR 0x020ac
#define VLV_GUNIT_CLOCK_GATE 0x182060
#define VLV_GUNIT_CLOCK_GATE (VLV_DISPLAY_BASE + 0x2060)
#define GCFG_DIS (1<<8)
#define VLV_IIR_RW 0x182084
#define VLV_IER 0x1820a0
......
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