提交 06050d5b 编写于 作者: T Thomas Gleixner 提交者: Aichun Shi

x86/sev: Include fpu/xcr.h

mainline inclusion
from mainline-v5.16-rc1
commit ff0c37e1
category: feature
bugzilla: https://gitee.com/openeuler/intel-kernel/issues/I590ZC
CVE: NA

Intel-SIG: commit ff0c37e1 x86/sev: Include fpu/xcr.h.

--------------------------------

Include the header which only provides the XCR accessors. That's all what
is needed here.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
Signed-off-by: NBorislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/20211015011539.896573039@linutronix.deSigned-off-by: NLin Wang <lin.x.wang@intel.com>
Signed-off-by: NAichun Shi <aichun.shi@intel.com>
上级 ed3fea35
......@@ -23,7 +23,7 @@
#include <asm/stacktrace.h>
#include <asm/sev-es.h>
#include <asm/insn-eval.h>
#include <asm/fpu/internal.h>
#include <asm/fpu/xcr.h>
#include <asm/processor.h>
#include <asm/realmode.h>
#include <asm/traps.h>
......
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