irqchip/gic-v3: Fix GICR_CTLR.RWP polling
stable inclusion from stable-v5.10.111 commit ff24114bb08d8b90edf2aff0a4fd0689523e6c17 category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I5GL1Z Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=ff24114bb08d8b90edf2aff0a4fd0689523e6c17 -------------------------------- commit 0df66645 upstream. It turns out that our polling of RWP is totally wrong when checking for it in the redistributors, as we test the *distributor* bit index, whereas it is a different bit number in the RDs... Oopsie boo. This is embarassing. Not only because it is wrong, but also because it took *8 years* to notice the blunder... Just fix the damn thing. Fixes: 021f6537 ("irqchip: gic-v3: Initial support for GICv3") Signed-off-by: NMarc Zyngier <maz@kernel.org> Cc: stable@vger.kernel.org Reviewed-by: NAndre Przywara <andre.przywara@arm.com> Reviewed-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> Link: https://lore.kernel.org/r/20220315165034.794482-2-maz@kernel.orgSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com> Reviewed-by: NWei Li <liwei391@huawei.com>
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