i2c: piix4: Add support for AMD ML and CZ SMBus changes
The locations of SMBus register base address and enablement bit are changed from AMD ML, which need this patch to be supported. Signed-off-by: NShane Huang <shane.huang@amd.com> Reviewed-by: NJean Delvare <khali@linux-fr.org> Signed-off-by: NWolfram Sang <wsa@the-dreams.de> Cc: stable@vger.kernel.org
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