提交 01b72153 编写于 作者: S Shraddha Barke 提交者: Jonathan Cameron

Staging: iio: meter: Prefer using the BIT macro

This patch replaces bit shifting on 1 with the BIT(x) macro

This was done with coccinelle:
@@ int g; @@

-(1 << g)
+BIT(g)
Signed-off-by: NShraddha Barke <shraddha.6596@gmail.com>
Signed-off-by: NJonathan Cameron <jic23@kernel.org>
上级 4839367d
......@@ -219,7 +219,7 @@ static int ade7753_reset(struct device *dev)
u16 val;
ade7753_spi_read_reg_16(dev, ADE7753_MODE, &val);
val |= 1 << 6; /* Software Chip Reset */
val |= BIT(6); /* Software Chip Reset */
return ade7753_spi_write_reg_16(dev, ADE7753_MODE, val);
}
......@@ -328,10 +328,10 @@ static int ade7753_set_irq(struct device *dev, bool enable)
goto error_ret;
if (enable)
irqen |= 1 << 3; /* Enables an interrupt when a data is
irqen |= BIT(3); /* Enables an interrupt when a data is
present in the waveform register */
else
irqen &= ~(1 << 3);
irqen &= ~BIT(3);
ret = ade7753_spi_write_reg_8(dev, ADE7753_IRQEN, irqen);
......@@ -345,7 +345,7 @@ static int ade7753_stop_device(struct device *dev)
u16 val;
ade7753_spi_read_reg_16(dev, ADE7753_MODE, &val);
val |= 1 << 4; /* AD converters can be turned off */
val |= BIT(4); /* AD converters can be turned off */
return ade7753_spi_write_reg_16(dev, ADE7753_MODE, val);
}
......
......@@ -223,7 +223,7 @@ static int ade7754_reset(struct device *dev)
if (ret < 0)
return ret;
val |= 1 << 6; /* Software Chip Reset */
val |= BIT(6); /* Software Chip Reset */
return ade7754_spi_write_reg_8(dev, ADE7754_OPMODE, val);
}
......@@ -350,10 +350,10 @@ static int ade7754_set_irq(struct device *dev, bool enable)
goto error_ret;
if (enable)
irqen |= 1 << 14; /* Enables an interrupt when a data is
irqen |= BIT(14); /* Enables an interrupt when a data is
present in the waveform register */
else
irqen &= ~(1 << 14);
irqen &= ~BIT(14);
ret = ade7754_spi_write_reg_16(dev, ADE7754_IRQEN, irqen);
if (ret)
......
......@@ -308,7 +308,7 @@ static int ade7758_reset(struct device *dev)
dev_err(dev, "Failed to read opmode reg\n");
return ret;
}
val |= 1 << 6; /* Software Chip Reset */
val |= BIT(6); /* Software Chip Reset */
ret = ade7758_spi_write_reg_8(dev, ADE7758_OPMODE, val);
if (ret < 0)
dev_err(dev, "Failed to write opmode reg\n");
......@@ -426,10 +426,10 @@ int ade7758_set_irq(struct device *dev, bool enable)
goto error_ret;
if (enable)
irqen |= 1 << 16; /* Enables an interrupt when a data is
irqen |= BIT(16); /* Enables an interrupt when a data is
present in the waveform register */
else
irqen &= ~(1 << 16);
irqen &= ~BIT(16);
ret = ade7758_spi_write_reg_24(dev, ADE7758_MASK, irqen);
if (ret)
......
......@@ -224,7 +224,7 @@ static int ade7759_reset(struct device *dev)
if (ret < 0)
return ret;
val |= 1 << 6; /* Software Chip Reset */
val |= BIT(6); /* Software Chip Reset */
return ade7759_spi_write_reg_16(dev,
ADE7759_MODE,
val);
......@@ -288,10 +288,10 @@ static int ade7759_set_irq(struct device *dev, bool enable)
goto error_ret;
if (enable)
irqen |= 1 << 3; /* Enables an interrupt when a data is
irqen |= BIT(3); /* Enables an interrupt when a data is
present in the waveform register */
else
irqen &= ~(1 << 3);
irqen &= ~BIT(3);
ret = ade7759_spi_write_reg_8(dev, ADE7759_IRQEN, irqen);
......@@ -314,7 +314,7 @@ static int ade7759_stop_device(struct device *dev)
return ret;
}
val |= 1 << 4; /* AD converters can be turned off */
val |= BIT(4); /* AD converters can be turned off */
return ade7759_spi_write_reg_16(dev, ADE7759_MODE, val);
}
......
......@@ -181,7 +181,7 @@ static int ade7854_reset(struct device *dev)
u16 val;
st->read_reg_16(dev, ADE7854_CONFIG, &val);
val |= 1 << 7; /* Software Chip Reset */
val |= BIT(7); /* Software Chip Reset */
return st->write_reg_16(dev, ADE7854_CONFIG, val);
}
......@@ -420,10 +420,10 @@ static int ade7854_set_irq(struct device *dev, bool enable)
goto error_ret;
if (enable)
irqen |= 1 << 17; /* 1: interrupt enabled when all periodical
irqen |= BIT(17); /* 1: interrupt enabled when all periodical
(at 8 kHz rate) DSP computations finish. */
else
irqen &= ~(1 << 17);
irqen &= ~BIT(17);
ret = st->write_reg_32(dev, ADE7854_MASK0, irqen);
if (ret)
......
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