mainline inclusion
from mainline-v6.3-rc4
commit d9826351
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/I6P4DV
CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=d98263512684a47e81bcb72a5408958ecd1e60b0

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The controller will always generate a completion interrupt when the
transfer is finished normally or not. Currently we use either error or
completion interrupt to finish, this may result the completion
interrupt unhandled and corrupt the next transfer, especially at low
speed mode. Since on error case, the error interrupt will come first
then is the completion interrupt. So only use the completion interrupt
to finish the whole transfer process.

Fixes: d62fbdb9 ("i2c: add support for HiSilicon I2C controller")
Reported-by: NSheng Feng <fengsheng5@huawei.com>
Signed-off-by: NSheng Feng <fengsheng5@huawei.com>
Signed-off-by: NYicong Yang <yangyicong@hisilicon.com>
Signed-off-by: NWolfram Sang <wsa@kernel.org>
Signed-off-by: Nlujunhua <lujunhua7@h-partners.com>