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由 Eric Anholt 提交于
We were leaving them in the power on state (or the state the firmware had set up for some client, if we were taking over from them). The boot state was 30 core clocks, when we actually want to sample some time after (to make sure that the new input bit has actually arrived). Signed-off-by: NEric Anholt <eric@anholt.net> Signed-off-by: NBoris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
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