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由 Doug Anderson 提交于
The KDIV value is often listed as unsigned but it needs to be treated as a 16-bit signed value when using it in calculations. Fix our rate recalculation to do this correctly. Before doing this, I tried setting EPLL on exynos5250 to: rate, m, p, s, k = 80000000, 107, 2, 4, 43691 This rate is exactly from the table in the exynos5250 user manual. I read this back as 80750003 with: cat /sys/kernel/debug/clk/fin_pll/fout_epll/clk_rate After this patch, it reads back as 80000003 Signed-off-by: NDoug Anderson <dianders@chromium.org> Acked-by: NKukjin Kim <kgene.kim@samsung.com> Reviewed-by: NVikas Sajjan <vikas.sajjan@linaro.org> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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