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由 Andrew Lunn 提交于
Marvell engineers tell us: It seems that many units use the RUNIT clock. SPI, UART, NAND, TWSI, ... So it's not possible to clock gate it. Currently the SPI, NAND and TWSI driver will clk_prepaure_enable() this clk, but since we have no idea what ... is, and turning this clk off results in a hard lock, unconditionally enable runit. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NSimon Baatz <gmbnomis@gmail.com>
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