The MC13xxx PMIC is mainly used on i.Mx SoC. On those SoC the SPI
hardware will deassert CS line as soon as the SPI FIFO is empty.
The MC13xxx hardware is very sensitive to CS line change as it
corrupts the transfer if CS is deasserted in the middle of a register
read or write.
It is not possible to use the CS line as a GPIO on some SoC, so we
need to workaround this by implementing a single SPI transfer to
access the PMIC.
Reviewed-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: NMarc Reilly <marc@cpdesign.com.au>
Signed-off-by: NPhilippe Rétornaz <philippe.retornaz@epfl.ch>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>