• S
    ARM: OMAP3: Add minimal omap3430 support · cc26b3b0
    Syed Mohammed, Khasim 提交于
    Add minimal omap3430 support based on earlier patches from
    Syed Mohammed Khasim. Also merge in omap34xx SRAM support
    from Karthik Dasu and use consistent naming for sram init
    functions.
    
    Also do following changes that make 34xx support usable:
    
    - Remove unused sram.c functions for 34xx
    
    - Rename IRQ_SIR_IRQ to INTCPS_SIR_IRQ and define it locally
      in entry-macro.S
    
    - Update mach-omap2/io.c to support 2420, 2430, and 34xx
    
    - Also merge in 34xx GPMC changes to add fields wr_access and
      wr_data_mux_bus from Adrian Hunter
    
    - Remove memory initialization call omap2_init_memory() until
      until more generic memory initialization patches are posted.
      It's OK to rely on bootloader initialization until then.
    Signed-off-by: NSyed Mohammed, Khasim <khasim@ti.com>
    Signed-off-by: Karthik Dasu<karthik-dp@ti.com>
    Signed-off-by: NAdrian Hunter <ext-adrian.hunter@nokia.com>
    Signed-off-by: NTony Lindgren <tony@atomide.com>
    
    
    
    cc26b3b0
entry-macro.S 2.3 KB
/*
 * arch/arm/plat-omap/include/mach/entry-macro.S
 *
 * Low-level IRQ helper macros for OMAP-based platforms
 *
 * This file is licensed under  the terms of the GNU General Public
 * License version 2. This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */
#include <mach/hardware.h>
#include <mach/io.h>
#include <mach/irqs.h>

#if defined(CONFIG_ARCH_OMAP1)

#if defined(CONFIG_ARCH_OMAP730) && \
	(defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX))
#error "FIXME: OMAP730 doesn't support multiple-OMAP"
#elif defined(CONFIG_ARCH_OMAP730)
#define INT_IH2_IRQ		INT_730_IH2_IRQ
#elif defined(CONFIG_ARCH_OMAP15XX)
#define INT_IH2_IRQ		INT_1510_IH2_IRQ
#elif defined(CONFIG_ARCH_OMAP16XX)
#define INT_IH2_IRQ		INT_1610_IH2_IRQ
#else
#warning "IH2 IRQ defaulted"
#define INT_IH2_IRQ		INT_1510_IH2_IRQ
#endif

 		.macro	disable_fiq
		.endm

		.macro  get_irqnr_preamble, base, tmp
		.endm

		.macro  arch_ret_to_user, tmp1, tmp2
		.endm

		.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp
		ldr	\base, =IO_ADDRESS(OMAP_IH1_BASE)
		ldr	\irqnr, [\base, #IRQ_ITR_REG_OFFSET]
		ldr	\tmp, [\base, #IRQ_MIR_REG_OFFSET]
		mov	\irqstat, #0xffffffff
		bic	\tmp, \irqstat, \tmp
		tst	\irqnr, \tmp
		beq	1510f

		ldr	\irqnr, [\base, #IRQ_SIR_FIQ_REG_OFFSET]
		cmp	\irqnr, #0
		ldreq	\irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET]
		cmpeq	\irqnr, #INT_IH2_IRQ
		ldreq	\base, =IO_ADDRESS(OMAP_IH2_BASE)
		ldreq	\irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET]
		addeqs	\irqnr, \irqnr, #32
1510:
		.endm

#endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)

#if defined(CONFIG_ARCH_OMAP24XX)
#include <mach/omap24xx.h>
#endif
#if defined(CONFIG_ARCH_OMAP34XX)
#include <mach/omap34xx.h>
#endif

#define INTCPS_SIR_IRQ_OFFSET	0x0040		/* Active interrupt number */

		.macro	disable_fiq
		.endm

		.macro  get_irqnr_preamble, base, tmp
		.endm

		.macro  arch_ret_to_user, tmp1, tmp2
		.endm

		.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp
		ldr	\base, =OMAP2_VA_IC_BASE
		ldr	\irqnr, [\base, #0x98] /* IRQ pending reg 1 */
		cmp	\irqnr, #0x0
		bne	2222f
		ldr	\irqnr, [\base, #0xb8] /* IRQ pending reg 2 */
		cmp	\irqnr, #0x0
		bne	2222f
		ldr	\irqnr, [\base, #0xd8] /* IRQ pending reg 3 */
		cmp	\irqnr, #0x0
2222:
		ldrne	\irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET]

		.endm

		.macro	irq_prio_table
		.endm

#endif
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