• P
    rtw88: 8723d: Organize chip TX/RX FIFO · d91277de
    Ping-Ke Shih 提交于
    TX FIFO size is 32k and it was divided into 256 pages with 128 bytes.
    A boundary is used to split pages into two parts, head part is used to
    store TX packets coming from host, and tail part is reserved for special
    purposes, such as beacon packet, null data packet and so on.
    
    The TX packets coming from host have many categories, such as VO, VI, BE,
    BK, MG and etc. When going into head part of TX FIFO, they are classified
    to four priority queue named low, normal, high and extra priority queues.
    Each priority queue occupies predefined number of page, if a certain
    priority queue is full, TX packet will store into PUB priority queue.
    
    Similarly, RX FIFO is 16k and split into two parts, head part is used to
    store RX packets, and tail part is 128 bytes and used to store report.
    Thus, we fill this boundary to register as well.
    Signed-off-by: NPing-Ke Shih <pkshih@realtek.com>
    Signed-off-by: NYan-Hsuan Chuang <yhchuang@realtek.com>
    Signed-off-by: NKalle Valo <kvalo@codeaurora.org>
    Link: https://lore.kernel.org/r/20200422034607.28747-8-yhchuang@realtek.com
    d91277de
reg.h 19.8 KB