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    ARM: dra7xx: Fix counter frequency drift for AM572x errata i856 · afc9d590
    Lennart Sorensen 提交于
    Errata i856 for the AM572x (DRA7xx) points out that the 32.768KHz external
    crystal is not enabled at power up.  Instead the CPU falls back to using
    an emulation for the 32KHz clock which is SYSCLK1/610.  SYSCLK1 is usually
    20MHz on boards so far (which gives an emulated frequency of 32.786KHz),
    but can also be 19.2 or 27MHz which result in much larger drift.
    
    Since this is used to drive the master counter at 32.768KHz * 375 /
    2 = 6.144MHz, the emulated speed for 20MHz is of by 570ppm, or about 43
    seconds per day, and more than the 500ppm NTP is able to tolerate.
    
    Checking the CTRL_CORE_BOOTSTRAP register can determine if the CPU
    is using the real 32.768KHz crystal or the emulated SYSCLK1/610, and
    by known that the real counter frequency can be determined and used.
    The real speed is then SYSCLK1 / 610 * 375 / 2 or SYSCLK1 * 75 / 244.
    Signed-off-by: NLen Sorensen <lsorense@csclub.uwaterloo.ca>
    Tested-by: NLokesh Vutla <lokeshvutla@ti.com>
    Signed-off-by: NTony Lindgren <tony@atomide.com>
    afc9d590
timer.c 20.9 KB