• K
    irqchip: bcm7120-l2: Extend driver to support 64+ bit controllers · c76acf4d
    Kevin Cernekee 提交于
    Most implementations of the bcm7120-l2 controller only have a single
    32-bit enable word + 32-bit status word.  But some instances have added
    more enable/status pairs in order to support 64+ IRQs (which are all
    ORed into one parent IRQ input).  Make the following changes to allow
    the driver to support this:
    
     - Extend DT bindings so that multiple words can be specified for the
       reg property, various masks, etc.
    
     - Add loops to the probe/handle functions to deal with each word
       separately
    
     - Allocate 1 generic-chip for every 32 IRQs, so we can still use the
       clr/set helper functions
    
     - Update the documentation
    
    This uses one domain per bcm7120-l2 DT node.  If the DT node defines
    multiple enable/status pairs (i.e. >=64 IRQs) then the driver will
    create a single IRQ domain with 2+ generic chips.  Multiple generic chips
    are required because the generic-chip code can only handle one
    enable/status register pair per instance.
    Signed-off-by: NKevin Cernekee <cernekee@gmail.com>
    Acked-by: NArnd Bergmann <arnd@arndb.de>
    Link: https://lkml.kernel.org/r/1415342669-30640-12-git-send-email-cernekee@gmail.comSigned-off-by: NJason Cooper <jason@lakedaemon.net>
    c76acf4d
brcm,bcm7120-l2-intc.txt 3.7 KB