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由 Vidya Sagar 提交于
Add endpoint mode support for PCIe C5 controller in P2972-0000 platform with information about supplies, PHY, PERST GPIO and GPIO that controls PCIe reference clock coming from the host system. Signed-off-by: NVidya Sagar <vidyas@nvidia.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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