• R
    serial: samsung: fix DMA for FIFO smaller than cache line size · 736cd79f
    Robert Baldyga 提交于
    So far DMA mode were activated when only number of bytes to send was
    equal or greater than min_dma_size. Due to requirement that DMA transaction
    buffer should be aligned to cache line size, the excessive bytes were
    written to FIFO before starting DMA transaction. The problem occurred
    when FIFO size were smaller than cache alignment, because writing all
    excessive bytes to FIFO would fail. It happened in DMA mode when PIO
    interrupts disabled, which caused driver hung.
    
    The solution is to test if buffer is alligned to cache line size before
    activating DMA mode, and if it's not, running PIO mode to align buffer
    and then starting DMA transaction. In PIO mode, when interrupts are
    enabled, lack of space in FIFO isn't the problem, so buffer aligning
    will always finish with success.
    
    Cc: <stable@vger.kernel.org> # v3.18+
    Reported-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
    Signed-off-by: NRobert Baldyga <r.baldyga@samsung.com>
    Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
    736cd79f
samsung.c 63.1 KB