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    RDMA/mlx5: Allow relaxed ordering read in VFs and VMs · bd4ba605
    Avihai Horon 提交于
    According to PCIe spec, Enable Relaxed Ordering value in the VF's PCI
    config space is wired to 0 and PF relaxed ordering (RO) setting should
    be applied to the VF. In QEMU (and maybe others), when assigning VFs,
    the RO bit in PCI config space is not emulated properly and is always
    set to 0.
    
    Therefore, pcie_relaxed_ordering_enabled() always returns 0 for VFs and
    VMs and thus MKeys can't be created with RO read even if the PF supports
    it.
    
    pcie_relaxed_ordering_enabled() check was added to avoid a syndrome when
    creating a MKey with relaxed ordering (RO) enabled when the driver's
    relaxed_ordering_read_pci_enabled HCA capability is out of sync with FW.
    With the new relaxed_ordering_read capability this can't happen, as it's
    set regardless of RO value in PCI config space and thus can't change
    during runtime.
    
    Hence, to allow RO read in VFs and VMs, use the new HCA capability
    relaxed_ordering_read without checking pcie_relaxed_ordering_enabled().
    The old capability checks are kept for backward compatibility with older
    FWs.
    
    Allowing RO in VFs and VMs is valuable since it can greatly improve
    performance on some setups. For example, testing throughput of a VF on
    an AMD EPYC 7763 and ConnectX-6 Dx setup showed roughly 60% performance
    improvement.
    Signed-off-by: NAvihai Horon <avihaih@nvidia.com>
    Reviewed-by: NShay Drory <shayd@nvidia.com>
    Reviewed-by: NAya Levin <ayal@nvidia.com>
    Link: https://lore.kernel.org/r/e7048640d66c341a8fa0465e099926e7989184bc.1681131553.git.leon@kernel.orgReviewed-by: NJacob Keller <jacob.e.keller@intel.com>
    Signed-off-by: NLeon Romanovsky <leon@kernel.org>
    bd4ba605
umr.c 19.7 KB