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由 Stanimir Varbanov 提交于
The reset bit for A9SS reset register is BIT(4) and for XTSS_SW_RESET it is BIT(0). Use the defines for those reset bits. Signed-off-by: NStanimir Varbanov <stanimir.varbanov@linaro.org>bd32d085
The reset bit for A9SS reset register is BIT(4) and for XTSS_SW_RESET
it is BIT(0). Use the defines for those reset bits.
Signed-off-by: NStanimir Varbanov <stanimir.varbanov@linaro.org>