There is an error in the current code that the XTAL MODE
pin was set to NB MPP1_31 which should be NB MPP1_9.
The latch register of NB MPP1_9 has different offset of 0x8.
Signed-off-by: NTerry Zhou <bjzhou@marvell.com>
[pali: Fix pin name in commit message]
Signed-off-by: NPali Rohár <pali@kernel.org>
Fixes: 7ea82504 ("clk: mvebu: Add the xtal clock for Armada 3700 SoC")
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20201106100039.11385-1-pali@kernel.orgReviewed-by: NMarek Behún <kabel@kernel.org>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>