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    drm/tilcdc: Fix setting clock divider for omap-l138 · a88ad3de
    David Lechner 提交于
    This fixes setting the clock divider on the TI OMAP-L138 LCDK board.
    
    The clock drivers for OMAP-L138 are being covernted to the common clock
    framework. When this happens, clk_set_rate() will no longer return an
    error. However, on this SoC, the clock rate cannot actually be changed
    because the clock has to maintain a fixed ratio to the ARM clock. So
    after attempting to set the clock rate, we need to check to see if the
    new rate is actually close enough. If not, then follow the previous
    error path to adjust the divider in LCDC IP block to compensate for not
    being able to change the parent clock rate.
    
    Tested working on a TI OMAP-L138 LCDK board.
    Signed-off-by: NDavid Lechner <david@lechnology.com>
    Signed-off-by: NJyri Sarha <jsarha@ti.com>
    a88ad3de
tilcdc_crtc.c 27.9 KB