• C
    drm/i915/gvt: Init PHY related registers for BXT · db7c8f1e
    Colin Xu 提交于
    Recent patch fixed the call trace
    "ERROR Port B enabled but PHY powered down? (PHY_CTL 00000000)".
    but introduced another similar call trace shown as:
    "ERROR Port C enabled but PHY powered down? (PHY_CTL 00000200)".
    The call trace will appear when host and guest enabled different ports,
    i.e. host using PORT C or neither PORT is enabled, while guest is always
    using PORT B as simulated by gvt. The issue is actually covered previously
    before the commit and reverals now when the commit do the right thing.
    
    On BXT, some PHY registers are initialized by vbios, before i915 loaded.
    Later i915 will re-program some, or skip some based on the implementation.
    The initialized mmio for guest i915 is done by gvt, based on the snapshot
    taken from host. If host and guest have different PORT enabled, some
    DPIO PHY mmios that gvt initialized for guest i915 will not match the
    simualted monitor for guest, which leads to guest i915 print the calltrace
    when it's trying to enable PHY and PORT.
    
    The solution is to init these DPIO PHY registers to default value, then
    guest i915 will program them to reasonable value based on the default
    powerwell table and enabled PORT. Together with the old patch, all similar
    call trace in guest kernel on BXT can be resolved.
    
    v2: Move PHY register init to intel_vgpu_reset_mmio (Min)
    v3: Do not delete empty line in issue fix patch. (zhenyu)
    
    Fixes: c8ab5ac3 ("drm/i915/gvt: Make correct handling to vreg
    BXT_PHY_CTL_FAMILY")
    Reviewed-by: NHe, Min <min.he@intel.com>
    Signed-off-by: NColin Xu <colin.xu@intel.com>
    Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com>
    db7c8f1e
mmio.c 8.2 KB