-
由 Jiri Prchal 提交于
This patch adds input selection of main codec clock - from what pin. Both registers set same value since codec uses clock divider or pll at one time. Signed-off-by: NJiri Prchal <jiri.prchal@aksignal.cz> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
a1f34af0