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由 Jan Dakinevich 提交于
Expose the feature to L1 hypervisor if host CPU supports it, since certain hypervisors requires it for own purposes. According to Intel SDM A.1, if CPU supports the feature, VMX_INSTRUCTION_INFO field of VMCS will contain detailed information about INS/OUTS instructions handling. This field is already copied to VMCS12 for L1 hypervisor (see prepare_vmcs12 routine) independently feature presence. Signed-off-by: NJan Dakinevich <jan.dakinevich@gmail.com> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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