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由 YoungJun Cho 提交于
The offset of register DSIM_PLLTMR_REG in Exynos5410 / 5420 / 5440 SoCs is different from the one in Exynos4 SoCs. In case of Exynos5410 / 5420 / 5440 SoCs, there is no frequency band bit in DSIM_PLLCTRL_REG, and it uses DSIM_PHYCTRL_REG and DSIM_PHYTIMING*_REG instead. So this patch adds driver data to distinguish it. Signed-off-by: NYoungJun Cho <yj44.cho@samsung.com> Acked-by: NInki Dae <inki.dae@samsung.com> Acked-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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