SiRFprimaII is the latest generation application processor from CSR’s
multi-function SoC product family.
The SoC support codes are in arch/arm/mach-prima2 from Linux mainline
3.0.
There are two I2C controllers on primaII, features include:
* Two I2C controller modules are on chip
* RISC I/O bus read write register
* Up to 16 bytes data buffer for issuing commands and writing data
  at the same time
* Up to 16 commands, and receiving read data 16 bytes at a time
* Error INT report (ACK check)
* No-ACK bus protocols (SCCB bus protocols)
Signed-off-by: NZhiwu Song <Zhiwu.Song@csr.com>
Signed-off-by: NXiangzhen Ye <Xiangzhen.Ye@csr.com>
Signed-off-by: NYuping Luo <Yuping.Luo@csr.com>
Signed-off-by: NBarry Song <Baohua.Song@csr.com>
Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>