Simplify the DMA restart logic to always queue up the next transfer
immediately if there is at least one more byte available in the FIFO,
so that the transfer will finish in a limited time.

This way the driver stops to rely on zero length transfers to signal
transfers ends. Those will go away when the idle detect DMA requests
are disabled.
Signed-off-by: NLucas Stach <l.stach@pengutronix.de>
Acked-by: NJiada Wang <jiada_wang@mentor.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>