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    i2c: aspeed: Retain delay/setup/hold values when configuring bus frequency · 95fd3ad9
    Andrew Jeffery 提交于
    In addition to the base, low and high clock configuration, the AC timing
    register #1 on the AST2400 houses fields controlling:
    
    1. tBUF: Minimum delay between Stop and Start conditions
    2. tHDSTA: Hold time for the Start condition
    3. tACST: Setup time for Start and Stop conditions, and hold time for the
       Repeated Start condition
    
    These values are defined in hardware on the AST2500 and therefore don't
    need to be set.
    
    aspeed_i2c_init_clk() was performing a direct write of the generated
    clock values rather than a read/mask/modify/update sequence to retain
    tBUF, tHDSTA and tACST, and therefore cleared the tBUF, tHDSTA and tACST
    fields on the AST2400. This resulted in a delay/setup/hold time of 1
    base clock, which in some configurations is not enough for some devices
    (e.g. the MAX31785 fan controller, with an APB of 48MHz and a desired
    bus speed of 100kHz).
    Signed-off-by: NAndrew Jeffery <andrew@aj.id.au>
    Reviewed-by: NBrendan Higgins <brendanhiggins@google.com>
    Tested-by: NBrendan Higgins <brendanhiggins@google.com>
    Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
    95fd3ad9
i2c-aspeed.c 26.5 KB