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    drm/i915/bdw: Implement PPGTT enable · 94e409c1
    Ben Widawsky 提交于
    Legacy PPGTT on GEN8 requires programming 4 PDP registers per ring.
    Since all rings are using the same address space with the current code
    the logic is simply to program all the tables we've setup for the PPGTT.
    
    v2: Turn on PPGTT in GFX_MODE
    
    v3: v2 was the wrong patch
    
    v4: Resolve conflicts due to patch series reordering.
    
    v5: Squash in fixup from Ben: Use LRI to write PDPs
    
    The docs (and simulator seems to back up) suggest that we can only
    program legacy PPGTT PDPs with LRI commands.
    
    v6: Rebase around context differences conflicts.
    
    v7: Use #defines for per ring PDPs. (Damien)
    
    v8: Don't use typede'f private_t.
    
    Signed-off-by: Ben Widawsky <ben@bwidawsk.net> (up to v3 and v7)
    Reviewed-by: NImre Deak <imre.deak@intel.com>
    Reviewed-by: NDamien Lespiau <damien.lespiau@intel.com>
    Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
    94e409c1
i915_gem_gtt.c 41.3 KB