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    drm/tilcdc: Fix interrupt enable/disable code for version 2 tilcdc · 947df7e3
    Jyri Sarha 提交于
    Fix interrupt enable/disable code for version 2 tilcdc. In version 2
    tilcdc there is a separate register for disabling interrupts. Writing
    0 to enable registers bits does not have any effect. The interrupt
    clear register works the same way, writing 1 to specific bit disables
    the interrupt and writing 0 does not have any effect.
    
    The "bug" that is fixed here does not really do any harm since the
    interrupts are enabled only once in the power up and disabled before
    power down.
    Signed-off-by: NJyri Sarha <jsarha@ti.com>
    Reviewed-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
    947df7e3
tilcdc_drv.c 18.3 KB