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    bcma: fix regression in interrupt assignment on mips · d8f1bd2f
    Hauke Mehrtens 提交于
    The wrong interrupts where assigned to the cores in
    bcma_core_mips_init(). This caused at least my serial console not to
    response to any input.
    
    This was caused by this patch which changed the order of the cores in
    the list:
    commit c334e25c
    Author: Rafał Miłecki <zajec5@gmail.com>
    Date:   Wed Jul 11 12:37:00 2012 +0200
    
        bcma: add new cores at the end of list
    
    This should be fixed properly later so that the correct interrupt
    numbers are assigned to the cores independently from the ordering of
    the list. This patch restores the old behavior again. I will look into
    the problem more deeply later.
    
    I also changed the order of the list with the cores and their assigned
    interrupt number which gets printed to the log. Now they are printed in
    the same order like all the other lists of cores and like it was done
    before the patch which changed the order.
    Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de>
    Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
    d8f1bd2f
driver_mips.c 6.6 KB